HD6417750SBP200 Renesas Electronics America, HD6417750SBP200 Datasheet - Page 482

• Manufacturer Part Number: HD6417750SBP200
• Description: IC SUPERH MPU ROMLESS 256BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7750r

Specifications of HD6417750SBP200

• Core Processor: SH-4
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: EBI/EMI, FIFO, SCI, SmartCard
• Peripherals: DMA, POR, WDT
• Number Of I /o: 28
• Program Memory Type: ROMless
• Ram Size: 24K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 2.07 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

Section 13 Bus State Controller (BSC)
• When DRAM or Synchronous DRAM Interface is Set*
Bit 11: A2W2
0
1
Notes: 1. External wait input is always ignored.
Bits 8 to 6—Area 1 Wait Control (A1W2–A1W0): These bits specify the number of wait states
to be inserted for area 1. For details on MPX interface setting, see table 13.6, MPX Interface is
Selected (Areas 0 to 6).
Bit 8: A1W2
0
1
Rev.7.00 Oct. 10, 2008 Page 396 of 1074
REJ09B0366-0700
2. RAS down mode is prohibited.
Bit 10: A2W1
0
1
0
1
Bit 7: A1W1
0
1
0
1
Bit 9: A2W0
0
1
0
1
0
1
0
1
Bit 6: A1W0
0
1
0
1
0
1
0
1
DRAM CAS
Assertion Width
1
2
3
4
7
10
13
16
0
1
2
3
6
9
12
15 (Initial value)
Inserted Wait States
1
Description
Description
Synchronous DRAM
CAS Latency Cycles
Inhibited
1 *
2
3
4 *
5 *
Inhibited
Inhibited
2
2
2
RDY Pin
Ignored
Enabled
Enabled
Enabled
Enabled
Enabled
Enabled
Enabled