MCF5282CVF80 Freescale Semiconductor, MCF5282CVF80 Datasheet - Page 171

IC MPU 32BIT 66MHZ 256-MAPBGA

MCF5282CVF80

Manufacturer Part Number
MCF5282CVF80
Description
IC MPU 32BIT 66MHZ 256-MAPBGA
Manufacturer
Freescale Semiconductor
Series
MCF528xr
Datasheet

Specifications of MCF5282CVF80

Core Processor
Coldfire V2
Core Size
32-Bit
Speed
80MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, SPI, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
142
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
256-MAPBGA
Controller Family/series
ColdFire
Ram Memory Size
64KB
Embedded Interface Type
CAN, I2C, SPI, UART
No. Of Pwm Channels
8
Digital Ic Case Style
MAPBGA
Rohs Compliant
No
Package
256MA-BGA
Device Core
ColdFire
Family Name
MCF528x
Maximum Speed
80 MHz
Operating Supply Voltage
3.3 V
Data Bus Width
32 Bit
Number Of Programmable I/os
150
Interface Type
CAN/Ethernet/I2C/QSPI/UART
On-chip Adc
8-chx10-bit
Number Of Timers
12
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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Chapter 9
Clock Module
The clock module configures the device for one of several clocking methods. Clocking modes include
internal phase-locked loop (PLL) clocking with either an external clock reference or an external crystal
reference supported by an internal crystal amplifier. The PLL can also be disabled and an external
oscillator can be used to clock the device directly. The clock module contains:
9.1
Features of the clock module include:
9.2
The clock module can be operated in normal PLL mode (default), 1:1 PLL mode, or external clock mode.
9.2.1
In normal PLL mode, the PLL is fully programmable. It can synthesize frequencies ranging from 2x to 9x
the reference frequency and has a post divider capable of reducing this synthesized frequency without
disturbing the PLL. The PLL reference can be either a crystal oscillator or an external clock.
9.2.2
In 1:1 PLL mode, the PLL synthesizes a frequency equal to the external clock input reference frequency.
The post divider is not active.
9.2.3
In external clock mode, the PLL is bypassed, and the external clock is applied to EXTAL. The resulting
operating frequency is equal to the external clock frequency.
Freescale Semiconductor
Crystal amplifier and oscillator (OSC)
Phase-locked loop (PLL)
Reduced frequency divider (RFD)
Status and control registers
Control logic
2- to 10-MHz reference crystal oscillator
Support for low-power modes
Separate clock out signal
Features
Modes of Operation
Normal PLL Mode
1:1 PLL Mode
External Clock Mode
MCF5282 and MCF5216 ColdFire Microcontroller User’s Manual, Rev. 3
9-1

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