MCF5282CVF80 Freescale Semiconductor, MCF5282CVF80 Datasheet - Page 491

• Manufacturer Part Number: MCF5282CVF80
• Description: IC MPU 32BIT 66MHZ 256-MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: MCF528xr

Specifications of MCF5282CVF80

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 80MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, SPI, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 142
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-MAPBGA
• Controller Family/series: ColdFire
• Ram Memory Size: 64KB
• Embedded Interface Type: CAN, I2C, SPI, UART
• No. Of Pwm Channels: 8
• Digital Ic Case Style: MAPBGA
• Rohs Compliant: No
• Package: 256MA-BGA
• Device Core: ColdFire
• Family Name: MCF528x
• Maximum Speed: 80 MHz
• Operating Supply Voltage: 3.3 V
• Data Bus Width: 32 Bit
• Number Of Programmable I/os: 150
• Interface Type: CAN/Ethernet/I2C/QSPI/UART
• On-chip Adc: 8-chx10-bit
• Number Of Timers: 12
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

25.5.3
Table 25-11
Freescale Semiconductor
Bits
2–0
7
6
5
4
3
Address
Reset
Field
R/W
PROPSE
FlexCAN Control Register 1 (CANCTRL1)
TSYNC
SAMP
Name
describes the CANCTRL1 fields.
LBUF
LOM
—
G
SAMP
7
Sampling mode. The SAMP bit determines whether the FlexCAN module will sample each
received bit one time or three times to determine its value.
0 One sample, taken at the end of phase buffer segment 1, is used to determine the value of the
1 Three samples are used to determine the value of the received bit. The samples are taken at the
Reserved, should be cleared.
Timer synchronize mode. The TSYNC bit enables the mechanism that resets the free-running timer
each time a message is received in Message Buffer 0. This feature provides the means to synchro-
nize multiple FlexCAN stations with a special “SYNC” message (global network time).
0 Timer synchronization disabled.
1 Timer synchronization enabled.
Note: there can be a bit clock skew of four to five counts between different FlexCAN modules that
are using this feature on the same network.
Lowest buffer transmitted first. The LBUF bit defines the transmit-first scheme.
0 Message buffer with lowest ID is transmitted first.
1 Lowest numbered buffer is transmitted first.
Listen Only Mode. In this mode the FlexCAN is able to receive messages without giving an
acknowledgment or being active on the bus.
0 Regular operation (listen only mode off).
1 Enable listen only mode.
Propagation segment time. PROPSEG defines the length of the propagation segment in the bit
time. The valid programmed values are 0 to 7. The propagation segment time is calculated as
follows:
Propagation Segment Time = (PROPSEG + 1) Time Quanta
where
1 Time Quantum = 1 Serial Clock (S-Clock) Period
received bit.
normal sample point and at the two preceding periods of the S-clock.
MCF5282 and MCF5216 ColdFire Microcontroller User’s Manual, Rev. 3
Figure 25-8. FlexCAN Control Register 1 (CANCTRL1)
—
6
Table 25-11. CANCTRL1 Field Descriptions
TSYNC
5
IPSBAR + 0x1C_0007
LBUF
4
0000_0000
Description
R/W
LOM
3
2
PROPSEG
1
0
FlexCAN
25-21