MCF5282CVF80 Freescale Semiconductor, MCF5282CVF80 Datasheet - Page 534

IC MPU 32BIT 66MHZ 256-MAPBGA

MCF5282CVF80

Manufacturer Part Number
MCF5282CVF80
Description
IC MPU 32BIT 66MHZ 256-MAPBGA
Manufacturer
Freescale Semiconductor
Series
MCF528xr
Datasheet

Specifications of MCF5282CVF80

Core Processor
Coldfire V2
Core Size
32-Bit
Speed
80MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, SPI, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
142
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
256-MAPBGA
Controller Family/series
ColdFire
Ram Memory Size
64KB
Embedded Interface Type
CAN, I2C, SPI, UART
No. Of Pwm Channels
8
Digital Ic Case Style
MAPBGA
Rohs Compliant
No
Package
256MA-BGA
Device Core
ColdFire
Family Name
MCF528x
Maximum Speed
80 MHz
Operating Supply Voltage
3.3 V
Data Bus Width
32 Bit
Number Of Programmable I/os
150
Interface Type
CAN/Ethernet/I2C/QSPI/UART
On-chip Adc
8-chx10-bit
Number Of Timers
12
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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Chip Configuration Module (CCM)
27.5.3.3 Chip Identification Register (CIR)
27.6
Six functions are defined within the chip configuration module:
27-6
1. Reset configuration
2. Chip mode selection
3. Boot device selection
4. Output pad strength configuration
Address
Bits
4–3
Reset
2
1
0
Field
R/W
Functional Description
15–8
Bits
7–0
BOOTSEL
BOOTPS
15
MODE
Name
MCF5282 and MCF5216 ColdFire Microcontroller User’s Manual, Rev. 3
Boot port size. Reflects the default selection for the boot port size if the boot device is
configured to be external.
00 Internal (32 bits) (This is the value used for this device.)
01 16 bits
10 8 bits
11 32 bits
The default function of the boot port size can be overridden during reset configuration.
Boot select. Reflects the default selection for the boot device.
0 Boot from internal boot device (This is the value used for this device.)
1 Boot from external boot device
Reserved, should be cleared.
Chip configuration mode. Reflects the default chip configuration mode.
0 Single-chip mode (This is the value used for this device.)
1 Master mode
The default mode can be overridden during reset configuration. If the default is overridden,
the CCR[MODE0] reflects the mode configuration.
Name
PRN
PIN
Table 27-5. RCON Field Descriptions (continued)
Figure 27-4. Chip Identification Register (CIR)
PIN
Table 27-6. CIR Field Description
Part identification number. Contains a unique identification number for the
device.
Part revision number. This number is increased by one for each new
full-layer mask set of this part. The revision numbers are assigned in
chronological order.
0010_0000_0000_0000
IPSBAR + 0x11_000a
8
R
Description
7
Description
PRN
Freescale Semiconductor
0

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