KMSC7119VM1200 Freescale Semiconductor, KMSC7119VM1200 Datasheet - Page 57

• Manufacturer Part Number: KMSC7119VM1200
• Description: DSP 16BIT W/DDR CTRLR 400-MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: MSC711x StarCorer
• Type: Fixed Pointr

Specifications of KMSC7119VM1200

• Interface: Host Interface, I²C, UART
• Clock Rate: 300MHz
• Non-volatile Memory: ROM (8 kB)
• On-chip Ram: 464kB
• Voltage - I/o: 3.30V
• Voltage - Core: 1.20V
• Operating Temperature: -40°C ~ 105°C
• Mounting Type: *
• Package / Case: 400-MAPBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

3.6
This section summarizes the connections and special conditions, such as pull-up or pull-down resistors, for the MSC7119
device. Following are guidelines for signal groups and configuration settings:
4
Consult a Freescale Semiconductor sales office or authorized distributor to determine product availability and place an order.
Freescale Semiconductor
MSC7119
•
•
•
•
•
•
•
Part
Clock and reset signals.
—
—
—
Interrupt signals. When used,
HDI16 signals.
— When they are configured for open-drain, the
— When the device boots through the HDI16, the
Ethernet MAC/TDM2 signals. The
I
General-purpose I/O (GPIO) signals. An unused GPIO pin can be disconnected. After boot, program it as an output
pin.
Other signals.
— The
— The
— Pins labelled NO CONNECT (NC) must not be connected.
— When a 16-pin double data rate (DDR) interface is used, the 16 unused data pins should be no connects (floating)
— Do not connect
2
C signals. The
Ordering Information
Connectivity Guidelines
SWTE
tied to
PORESET
BM[0–1]
V
HRESET
However, these pins are also sampled at power-on reset to determine the HDI16 boot mode and may need to be
pulled down. When these pins must be pulled down on reset and pulled up otherwise, a buffer can be used with
the
depending on the required boot mode settings.
scan.
if the used lines are terminated.
pins, and
DDIO
Supply Voltage
2.5 V memory
HRESET
1.2 V core
TEST0
TPSEL
3.3 V I/O
or
V
is used to configure the MSC7119 device and is sampled on the deassertion of
DDC
configure the MSC7119 device and are sampled until
GND
should be pulled up.
DBREQ
, this signal can be left floating.
pin must be connected to ground.
pin should be pulled up to enable debug access via the EOnCE port and pulled down for boundary
SCL
or
signal as the enable.
either directly or through pull-up or pull-down resistors.
GND
DBREQ
and
to
Molded Array Process-Ball Grid
either directly or through pull-up or pull-down resistors until
HRRQ
SDA
to
Array (MAP-BGA)
IRQ
signals, when programmed for I
DONE
Package Type
.
pins must be pulled up.
MDIO
(as you would for the MSC8101 device). Connect
MSC7119 Data Sheet, Rev. 8
signal requires an external pull-up resistor.
HREQ/HREQ
HDDS, HDSP
Count
Pin
400
2
C, requires an external pull-up resistor.
or
Frequency
and
PORESET
(MHz)
HTRQ/HTRQ
Core
300
H8BIT
pins should be pulled up or down,
Solder Spheres
is deasserted, so they should be tied to
Lead-bearing
Lead-free
signals require a pull-up resistor.
PORESET
DONE
PORESET
Ordering Information
to one of the EVNT
is deasserted. After
MSC7119VM1200
MSC7119VF1200
Order Number
, so it should be
57