ADSP-BF538BBCZ-4F4 Analog Devices Inc, ADSP-BF538BBCZ-4F4 Datasheet - Page 43

• Manufacturer Part Number: ADSP-BF538BBCZ-4F4
• Description: IC, FLOAT-PT DSP, 16BIT, 400MHZ, BGA-316
• Manufacturer: Analog Devices Inc
• Series: Blackfinr
• Type: Fixed Pointr

Specifications of ADSP-BF538BBCZ-4F4

• No. Of Bits: 16 Bit
• Frequency: 400MHz
• Supply Voltage: 1.2V
• Embedded Interface Type: CAN, I2C, PPI, SPI, TWI, UART
• No. Of I/o's: 54
• Flash Memory Size: 512KB
• Interface: CAN, SPI, SSP, TWI, UART
• Clock Rate: 400MHz
• Non-volatile Memory: FLASH (512 kB)
• On-chip Ram: 148kB
• Voltage - I/o: 3.00V, 3.30V
• Voltage - Core: 1.20V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 316-CSPBGA
• Device Core Size: 16b
• Architecture: Modified Harvard
• Format: Fixed Point
• Clock Freq (max): 400MHz
• Mips: 400
• Device Input Clock Speed: 400MHz
• Ram Size: 32KB
• Program Memory Size: 512KB
• Operating Supply Voltage (typ): 1.2/2.5/3.3V
• Operating Supply Voltage (min): 0.8/2.25/2.7V
• Operating Supply Voltage (max): 1.32/3.6V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 316
• Package Type: CSPBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: ADZS-BFAUDIO-EZEXT - BOARD EVAL AUDIO BLACKFIN
• Lead Free Status / Rohs Status: Compliant

Serial Peripheral Interface Ports—Slave Timing
Table 36
Table 36. Serial Peripheral Interface (SPI) Ports—Slave Timing
Parameter
Timing Requirements
t
t
t
t
t
t
t
Switching Characteristics
t
t
t
t
t
SPICHS
SPICLS
SPICLK
HDS
SPITDS
SDSCI
SSPID
DSOE
DSDHI
DDSPID
HDSPID
HSPID
and
CPHA = 1
CPHA = 0
Figure 28
(OUTPUT)
(OUTPUT)
SPIxMISO
SPIxMOSI
SPIxMISO
SPIxMOSI
SPIxSCK
(INPUT)
(INPUT)
(INPUT)
(INPUT)
Serial Clock High Period
Serial Clock Low Period
Serial Clock Period
Last SCKx Edge to SPIxSS Not Asserted
Sequential Transfer Delay
SPIxSS Assertion to First SCKx Edge
Data Input Valid to SCKx Edge (Data Input Setup)
SCKx Sampling Edge to Data Input Invalid
SPIxSS Assertion to Data Out Active
SPIxSS Deassertion to Data High impedance
SCKx Edge to Data Out Valid (Data Out Delay)
SCKx Edge to Data Out Invalid (Data Out Hold)
t
DSOE
describe SPI ports slave operations.
t
DSOE
t
SDSCI
t
SSPID
t
DDSPID
t
SPICLS
Figure 28. Serial Peripheral Interface (SPI) Ports—Slave Timing
t
HDSPID
t
Rev. D | Page 43 of 56 | July 2010
SPICHS
t
HDSPID
t
HSPID
t
DDSPID
t
SSPID
t
DDSPID
t
SPICLK
ADSP-BF538/ADSP-BF538F
t
HSPID
t
Min
2 × t
2 × t
4 × t
2 × t
2 × t
2 × t
2.0
2.0
0
0
0
HDS
t
t
DSDHI
DSDHI
SCLK
SCLK
SCLK
SCLK
SCLK
SCLK
–1.5
–1.5
–1.5
–1.5
–1.5
t
SPITDS
Max
8
8
10
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns