MC68030RC20C Freescale Semiconductor, MC68030RC20C Datasheet - Page 105

• Manufacturer Part Number: MC68030RC20C
• Description: IC MPU 32BIT ENHANCED 128-PGA
• Manufacturer: Freescale Semiconductor

Specifications of MC68030RC20C

• Processor Type: M680x0 32-Bit
• Speed: 20MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 128-PGA
• Family Name: M68000
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 20MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 5V
• Operating Supply Voltage (max): 5.25V
• Operating Supply Voltage (min): 4.75V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Through Hole
• Pin Count: 128
• Package Type: PGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Compliant

3
3-20
ASL,ASR
BFEXTS
BFEXTU
Opcode
toCCR
BFCHG
BFFFO
ADDA
ADDQ
ADDX
BFCLR
BFSET
BFTST
ABCD
toSR
BCHG
BFINS
ANDI
ADDI
ANDI
ANDI
8CLR
BKPT
BTST
AND
BSET
ADD
BRA
BSR
Bcc
, Run breakpoint acknowledge cycle;
! 1 J) (bit number) of Destination
Source',Destination t Destination
else TRAP
0 J (bit number) of Destination
0 I) (bit field) of Destination
(bit field) of Source I) Dn
(bit offset) of Source I) Dn
(bit offset) of Source Bit Scan ~ Dn
(bit field) of Destination
TRAP as illegal instruction
Source10 + Destination 10 + X i Destination
Source + Destination $ Destination
Source + Destination 0 Destination
Immediate Data + Destination I) Destination
Immediate Data + Destination ~ Destination
Source + Destination + X O Destination
Immediate DataADestination J Destination
Source.\CCR 0CCR
If supervisor state
Destination Shifted by (count) 0 Destination
If (condition true) then PC+d I) PC
-((number) of Destination) I) Z;
-((number) of Destination) I) (bit number) of Destination
-((bit number) of Destination) t Z;
-((bit field) of Destination) ~ (bit field) of Destination
Dn 0 (bit field) of Destination
PC+d t PC
S P - 4 I) SP; PC J (SP); PC+d j PC
ls I) (bit field) of Destination
-((bit number) of Destination) l Z;
-((bit number) of Destination) i Z;
the SourceASR 0 SR
Table 3-14. Instruction Set Summary (Sheet 1 of 5)
Operation
MC68030 USER'S MANUAL
I ABCD Dy,Dx
A D D (ea),Dn
:AD D Dn,(ea)
A D D X - (Ay), - (Ax)
A N D I #(data),SR
ABCD - (Ay), - (Ax)
ADDA (ea),An
ADDI #(data),(ea)
ADDQ #(data),(ea)
ADDX Dy,Dx
AND (ea),Dn
AND Dn,(ea)
ANDI #(data),(ea)
ANDI #(data),CCR
ASd Dx,Dy
ASd #(data),Dy
ASd (ea)
BCHG Dn,(ea)
BCHG #(data),(ea)
BcLR Dn,(ea)
BFEXTS (ea){offset :width},Dn
BFEXTU (ea){offset :width},Dn
8FTST (ea){offset:width}
BSET
BSR (label)
Bcc (label)
BCLR #(data),(ea)
BFCHG (ea){offset:width}
BFCLR (ea){offset:width}
BFFFO (ea){offset:width},Dn
BFINS Dn,(ea){offset:width}
BFSET (ea){offset:width}
BKPT #(data)
BRA (label)
BSET Dn,(ea)
BTST Dn,(ea)
BTST #(data),(ea)
#(data),(ea)
Syntax
MOTOROLA