MC68030RC20C Freescale Semiconductor, MC68030RC20C Datasheet - Page 489

• Manufacturer Part Number: MC68030RC20C
• Description: IC MPU 32BIT ENHANCED 128-PGA
• Manufacturer: Freescale Semiconductor

Specifications of MC68030RC20C

• Processor Type: M680x0 32-Bit
• Speed: 20MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 128-PGA
• Family Name: M68000
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 20MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 5V
• Operating Supply Voltage (max): 5.25V
• Operating Supply Voltage (min): 4.75V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Through Hole
• Pin Count: 128
• Package Type: PGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Compliant

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11.6.1 Fetch Effective Address (fea)
11-26
for the processor to calculate and fetch the specified effective address. The
total number of clock cycles is outside the parentheses. The number of read,
All timing data assumes two-clock reads and writes.
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The fetch effective address table indicates the number of clock periods needed
effective addresses are divided by their formats (refer to 2.5
Encoding Summary).
prefetch, and write cycles is given inside the parentheses as (r/p/w). The read,
prefetch, and write cycles are included in the total clock cycle number.
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SINGLE EFFECTIVE ADDRESS
% Dn
% An
BRIEF FORMAT EXTENSION WORD
(An)
#(data).B
#(data).L
(An) ÷
(d16,An) or (d16,PC)
(xxx).W
(xxx).L
#(data).W
(dS'An'xn) °r (d8'PC'xn,
- (An)
Ad,r.a ede
INSTRUCTION FORMAT
For instruction-cache case and for no-cache case, the
MC68030 USER'S MANUAL
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I
- -
- -
,ead
0
2
2
2
2
2
4
1
1
4
]
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- -
- -
2
2
0
0
0
0
1
1
2
Ta,
2
,-Cac, eC.e I NoCao.eC.el
4(1/0/0)
4(1/0/0)
4(1/0/0)
2(0/0/0)
4(0/0/0)
o(o/o/o)
o(o/o/o)
3(1/0/0)
3(1/0/0)
4(1/0/0)
2(0/0/0)
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Effective Address
I
6(1/0/0)
MOTOROLA
o(O/OlO)
0(0/0/0)
4(1/0/0)
5(1/1/0)
4(1/1/0)
4(0/1/0)
]
3(1/0/0)
3(1/0/0)
4(1/1/0)
2(0/1/0)
2(0/1/0)
6(1/1/0)
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