MC68030RC20C Freescale Semiconductor, MC68030RC20C Datasheet - Page 130

• Manufacturer Part Number: MC68030RC20C
• Description: IC MPU 32BIT ENHANCED 128-PGA
• Manufacturer: Freescale Semiconductor

Specifications of MC68030RC20C

• Processor Type: M680x0 32-Bit
• Speed: 20MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 128-PGA
• Family Name: M68000
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 20MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 5V
• Operating Supply Voltage (max): 5.25V
• Operating Supply Voltage (min): 4.75V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Through Hole
• Pin Count: 128
• Package Type: PGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Compliant

5.6.3 Read/Write (R/W)
5.6.4 Read-Modify-Write Cycle (RMC)
5.6.5 Address Strobe (AS)
5.6 BUS CONTROL SIGNALS
5.6.10perand Cycle Start (OCS)
5.6.2 External Cycle Start (ECS)
MOTOROLA
This output signal indicates the beginning of the first external bus cycle for
subsequent cycles that are performed due to dynamic bus sizing or operand
This output signal indicates the beginning of a bus cycle of any type. Refer
to 7.1.1 Bus
This three-state output signal defines the type of bus cycle. A high level
Control Signals
This three-state output signal identifies the current bus cycle as part of an
for information about the relationship of RMC to bus operation.
This three-state output indicates that a valid address is on the address bus.
The function code, size, and read/write signals are also valid when AS is
The following signals control synchronous bus transfer operations for the
an instruction prefetch or a data operand transfer. OCS is not asserted for
misalignment. Refer to 7.1.1 Bus Control Signals for information about the
bus operation.
indicates a read cycle; a low level indicates a write cycle. Refer to 7.1.1 Bus
ation.
indivisible read-modify-write operation; it remains asserted during all bus
cycles of the read-modify-write operation. Refer to 7.1.1 Bus
asserted. Refer to 7.1.3
of AS to bus operation.
MC68030.
relationship of OCS to bus operation.
Control Signals
for information about the relationship of R/W to bus oper-
m
Address Strobe
MC68030 USER'S MANUAL
for information about the relationship of ECS to
for information about the relationship
Control Signals
5-5
5