MC68030RC20C Freescale Semiconductor, MC68030RC20C Datasheet - Page 473
MC68030RC20C
Manufacturer Part Number
MC68030RC20C
Description
IC MPU 32BIT ENHANCED 128-PGA
Manufacturer
Freescale Semiconductor
Specifications of MC68030RC20C
Processor Type
M680x0 32-Bit
Speed
20MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
128-PGA
Family Name
M68000
Device Core
ColdFire
Device Core Size
32b
Frequency (max)
20MHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
5V
Operating Supply Voltage (max)
5.25V
Operating Supply Voltage (min)
4.75V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Through Hole
Pin Count
128
Package Type
PGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC68030RC20C-1F91C
Manufacturer:
ON/安森美
Quantity:
20 000
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11
11-10
INSTRUCTION
CONTROLLER
SEQUENCER
EXECUTION
ACTIVITY
COUNT
TIME
8US
BUS
CLK
CLK
Comparing the two alignments, the execution time of the MOVE instruction
of nine clocks. Referring to the table in 11.6.6 MOVE Instruction and the table
which has an average no-cache-case time of seven clocks.
The average no-cache-case timing rather than the maximum no-cache-case
timing gives a closer approximation of the actual timing of an instruction
stream in many cases. The total execution time of the two instructions in the
Figure 11-5 shows processor activity for odd alignment. The instruction stream
is positioned in 32-bit memory as:
is eight clocks for even alignment and 10 clocks for odd alignment, an average
in 11.6.1 Fetch Effective Address (fea), the average no-cache-case time is
2 + 7 = 9 clocks. A similar calculation can be made of the CMPI instruction,
previous example is 16 clocks for both even and odd alignment. Adding the
A d d r e s s
1
2
n + 1 2
n
n + 4
n + 8
Figure 11-5. Processor Activity - - Odd Alignment
3
4
MC68030 USER'S MANUAL
LEGEND:
5
MOVE.L (d16,An.Dn),Dn
#(data).W,(d16,An}
EA Ext
CMPI
6
d16
• . .
7
8
F - q
# ( d a t a . W )
10
M OV E
d16
9
• • •
11
PREFETCH
CALCULATE AND FETCH
n + 12
12
CMPI.W #(data).W,(d16,An)
SOURCE EA
FOR CMPI
13
READ FROM
(d16,An)
14
MOTOROLA
15
PREFETCH
PERFORM
n + 16
CMPI
16
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