ST72T511R9T6 STMicroelectronics, ST72T511R9T6 Datasheet - Page 18

Microcontrollers (MCU) UV EPROM 60K SPI/SCI

ST72T511R9T6

Manufacturer Part Number
ST72T511R9T6
Description
Microcontrollers (MCU) UV EPROM 60K SPI/SCI
Manufacturer
STMicroelectronics
Datasheet

Specifications of ST72T511R9T6

Data Bus Width
8 bit
Program Memory Type
EEPROM
Program Memory Size
60 KB
Data Ram Size
2048 B
Interface Type
CAN, SCI, SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
48
Number Of Timers
5
Operating Supply Voltage
3 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Package / Case
TQFP-64
Minimum Operating Temperature
- 40 C
On-chip Adc
8 bit
Lead Free Status / Rohs Status
No

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Part Number:
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DATA EEPROM (Cont’d)
3.4 POWER SAVING MODES
Wait mode
The DATA EEPROM can enter WAIT mode on ex-
ecution of the WFI instruction of the microcontrol-
ler. The DATA EEPROM will immediately enter
this mode if there is no programming in progress,
otherwise the DATA EEPROM will finish the cycle
and then enter WAIT mode.
Halt mode
The DATA EEPROM immediatly enters HALT
mode if the microcontroller executes the HALT in-
struction. Therefore the EEPROM will stop the
function in progress, and data may be corrupted.
Figure 6. Data EEPROM Programming Cycle
18/164
INTERNAL
PROGRAMMING
VOLTAGE
DATA LATCHES
WRITE OF
ERASE CYCLE
READ OPERATION NOT POSSIBLE
t
PROG
3.5 ACCESS ERROR HANDLING
If a read access occurs while LAT=1, then the data
bus will not be driven.
If a write access occurs while LAT=0, then the
data on the bus will not be latched.
If a programming cycle is interrupted (by software/
RESET action), the memory data will not be guar-
anteed.
WRITE CYCLE
READ OPERATION POSSIBLE
EEPROM INTERRUPT
PGM
LAT

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