PI7C9X20404SLCFDE Pericom Semiconductor, PI7C9X20404SLCFDE Datasheet - Page 22

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PI7C9X20404SLCFDE

Manufacturer Part Number
PI7C9X20404SLCFDE
Description
IC PCIE PACKET SWITCH 128LQFP
Manufacturer
Pericom Semiconductor
Series
SlimLine™r

Specifications of PI7C9X20404SLCFDE

Applications
Data Transport
Interface
Advanced Configuration Power Interface (ACPI)
Package / Case
128-LQFP
Mounting Type
Surface Mount
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Voltage - Supply
-

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6
The EEPROM interface consists of two pins: EECLK (EEPROM clock output) and EEPD (EEPROM bi-
directional serial data). The Switch may control an ISSI IS24C04 or compatible parts using into 512x8 bits. The
EEPROM is used to initialize a number of registers before enumeration. This is accomplished after PRST# is de-
asserted, at which time the data from the EEPROM is loaded. The EEPROM interface is organized into a 16-bit
base, and the Switch supplies a 7-bit EEPROM word address. The Switch does not control the EEPROM address
input. It can only access the EEPROM with address input set to 0.
The System Management Bus interface consists of two pins: SMBCLK (System Management Bus Clock input) and
SMBDATA (System Management Bus Data input/ output).
6.1 EEPROM INTERFACE
6.1.1 AUTO MODE EERPOM ACCESS
The Switch may access the EEPROM in a WORD format by utilizing the auto mode through a hardware sequencer.
The EEPROM start-control, address, and read/write commands can be accessed through the configuration register.
Before each access, the software should check the Autoload Status bit before issuing the next start.
6.1.2 EEPROM MODE AT RESET
During a reset, the Switch will automatically load the information/data from the EEPROM if the automatic load
condition is met. The first offset in the EEPROM contains a signature. If the signature is recognized, the autoload
initiates right after the reset.
During the autoload, the Bridge will read sequential words from the EEPROM and write to the appropriate registers.
Before the Bridge registers can be accessed through the host, the autoload condition should be verified by reading
bit [3] offset DCh (EEPROM Autoload Status). The host access is allowed only after the status of this bit is set to '0'
which indicates that the autoload initialization sequence is complete.
6.1.3 EEPROM SPACE ADDRESS MAP
July 2009 – Revision 1.2
Pericom Semiconductor
EEPROM INTERFACE AND SYSTEM MANAGEMENT BUS
Extended VC Count / Link Capability / Switch Mode Operation / Interrupt pin for Port 1 ~ 3
Max_Payload_Size Support / ASPM Support / Role_Base Error Reporting / RefClk ppm
Reserved
15 – 8
EEPROM Signature (1516h)
NFTS / Scramble for Port0
NFTS / Scramble for Port1
NFTS / Scramble for Port2
NFTS / Scramble for Port3
Subsystem Vender ID
Subsystem ID
Vendor ID
Difference
Device ID
Reserved
Reserved
Reserved
Page 22 of 77
Revision ID
7 – 0
4Port-4Lane PCI Express® Switch
BYTE OFFSET
SlimLine
PI7C9X20404SL
0Ah
1Ah
0Ch
0Eh
1Ch
00h
02h
04h
06h
08h
10h
12h
14h
16h
18h
Datasheet
TM
Family

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