PI7C9X20404SLCFDE Pericom Semiconductor, PI7C9X20404SLCFDE Datasheet - Page 6

• Manufacturer Part Number: PI7C9X20404SLCFDE
• Description: IC PCIE PACKET SWITCH 128LQFP
• Manufacturer: Pericom Semiconductor
• Series: SlimLine™r

Specifications of PI7C9X20404SLCFDE

• Applications: Data Transport
• Interface: Advanced Configuration Power Interface (ACPI)
• Package / Case: 128-LQFP
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Voltage - Supply: -

July 2009 – Revision 1.2
Pericom Semiconductor
7.2.8
7.2.9
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PRIMARY LATENCY TIMER REGISTER – OFFSET 0Ch ................................................................35
HEADER TYPE REGISTER – OFFSET 0Ch......................................................................................35
PRIMARY BUS NUMBER REGISTER – OFFSET 18h ......................................................................35
SECONDARY BUS NUMBER REGISTER – OFFSET 18h ................................................................35
SUBORDINATE BUS NUMBER REGISTER – OFFSET 18h ............................................................35
SECONDARY LATENCY TIMER REGISTER – OFFSET 18h ...........................................................36
I/O BASE ADDRESS REGISTER – OFFSET 1Ch..............................................................................36
I/O LIMIT ADDRESS REGISTER – OFFSET 1Ch.............................................................................36
SECONDARY STATUS REGISTER – OFFSET 1Ch ..........................................................................36
MEMORY BASE ADDRESS REGISTER – OFFSET 20h ...................................................................37
MEMORY LIMIT ADDRESS REGISTER – OFFSET 20h ..................................................................37
PREFETCHABLE MEMORY BASE ADDRESS REGISTER – OFFSET 24h.....................................37
PREFETCHABLE MEMORY LIMIT ADDRESS REGISTER – OFFSET 24h....................................37
PREFETCHABLE MEMORY BASE ADDRESS UPPER 32-BITS REGISTER – OFFSET 28h .........38
PREFETCHABLE MEMORY LIMIT ADDRESS UPPER 32-BITS REGISTER – OFFSET 2Ch .......38
I/O BASE ADDRESS UPPER 16-BITS REGISTER – OFFSET 30h...................................................38
I/O LIMIT ADDRESS UPPER 16-BITS REGISTER – OFFSET 30h..................................................38
CAPABILITY POINTER REGISTER – OFFSET 34h .........................................................................38
INTERRUPT LINE REGISTER – OFFSET 3Ch.................................................................................39
INTERRUPT PIN REGISTER – OFFSET 3Ch ...................................................................................39
BRIDGE CONTROL REGISTER – OFFSET 3Ch ..............................................................................39
POWER MANAGEMENT CAPABILITY ID REGISTER – OFFSET 80h ...........................................40
NEXT ITEM POINTER REGISTER – OFFSET 80h...........................................................................40
POWER MANAGEMENT CAPABILITIES REGISTER – OFFSET 80h.............................................40
POWER MANAGEMENT DATA REGISTER – OFFSET 84h ............................................................40
PPB SUPPORT EXTENSIONS – OFFSET 84h..................................................................................41
DATA REGISTER – OFFSET 84h ......................................................................................................41
MSI CAPABILITY ID REGISTER – OFFSET 8Ch (Downstream Port Only) ....................................41
NEXT ITEM POINTER REGISTER – OFFSET 8Ch (Downstream Port Only) .................................42
MESSAGE CONTROL REGISTER – OFFSET 8Ch (Downstream Port Only) ..................................42
MESSAGE ADDRESS REGISTER – OFFSET 90h (Downstream Port Only) ....................................42
MESSAGE UPPER ADDRESS REGISTER – OFFSET 94h (Downstream Port Only) ......................42
MESSAGE DATA REGISTER – OFFSET 98h (Downstream Port Only) ...........................................42
VPD CAPABILITY ID REGISTER – OFFSET 9Ch (Upstream Port Only)........................................42
NEXT ITEM POINTER REGISTER – OFFSET 9Ch (Upstream Port Only) ......................................43
VPD REGISTER – OFFSET 9Ch (Upstream Port Only)....................................................................43
VPD DATA REGISTER – OFFSET A0h (Upstream Port Only).........................................................43
VENDOR SPECIFIC CAPABILITY ID REGISTER – OFFSET A4h..................................................43
NEXT ITEM POINTER REGISTER – OFFSET A4h ..........................................................................44
LENGTH REGISTER – OFFSET A4h ................................................................................................44
XPIP CSR0 – OFFSET A8h (Test Purpose Only)...............................................................................44
XPIP CSR1 – OFFSET ACh (Test Purpose Only) ..............................................................................44
REPLAY TIME-OUT COUNTER – OFFSET B0h..............................................................................44
ACKNOWLEDGE LATENCY TIMER – OFFSET B0h.......................................................................45
SWITCH OPERATION MODE – OFFSET B4h (Upstream Port)......................................................45
SWITCH OPERATION MODE – OFFSET B4h (Downstream Port) .................................................46
XPIP CSR2 – OFFSET B8h (Test Purpose Only)...............................................................................47
TL CSR – OFFSET BCh .....................................................................................................................47
SSID/SSVID CAPABILITY ID REGISTER – OFFSET C0h................................................................47
NEXT ITEM POINTER REGISTER – OFFSET C0h ..........................................................................47
SUBSYSTEM VENDOR ID REGISTER – OFFSET C4h ....................................................................47
SUBSYSTEM ID REGISTER – OFFSET C4h.....................................................................................48
GPIO CONTROL REGISTER – OFFSET D8h (Upstream Port Only)...............................................48
Page 6 of 77
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