PI7C9X20404SLCFDE Pericom Semiconductor, PI7C9X20404SLCFDE Datasheet - Page 5

• Manufacturer Part Number: PI7C9X20404SLCFDE
• Description: IC PCIE PACKET SWITCH 128LQFP
• Manufacturer: Pericom Semiconductor
• Series: SlimLine™r

Specifications of PI7C9X20404SLCFDE

• Applications: Data Transport
• Interface: Advanced Configuration Power Interface (ACPI)
• Package / Case: 128-LQFP
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Voltage - Supply: -

TABLE OF CONTENTS
1
2
3
4
5
6
7
July 2009 – Revision 1.2
Pericom Semiconductor
3.1
3.2
3.3
3.4
3.5
4.1
5.1
5.2
5.3
5.4
5.5
5.6
5.7
5.8
5.9
5.10
6.1
6.2
7.1
7.2
FEATURES.........................................................................................................................................................10
GENERAL DESCRIPTION..............................................................................................................................11
PIN DESCRIPTION...........................................................................................................................................12
PIN ASSIGNMENTS .........................................................................................................................................15
FUNCTIONAL DESCRIPTION.......................................................................................................................16
EEPROM INTERFACE AND SYSTEM MANAGEMENT BUS..................................................................22
REGISTER DESCRIPTION.............................................................................................................................31
5.6.1
5.6.2
5.6.3
5.6.4
5.6.5
6.1.1
6.1.2
6.1.3
6.1.4
7.2.1
7.2.2
7.2.3
7.2.4
7.2.5
7.2.6
7.2.7
PCI EXPRESS INTERFACE SIGNALS ....................................................................................................12
PORT CONFIGURATION SIGNALS .......................................................................................................12
MISCELLANEOUS SIGNALS..................................................................................................................12
JTAG BOUNDARY SCAN SIGNALS ......................................................................................................13
POWER PINS.............................................................................................................................................14
PIN LIST
PHYSICAL LAYER CIRCUIT ..................................................................................................................16
DATA LINK LAYER (DLL)......................................................................................................................18
TRANSACTION LAYER RECEIVE BLOCK (TLP DECAPSULATION) ..............................................18
ROUTING ..................................................................................................................................................18
TC/VC MAPPING......................................................................................................................................19
QUEUE.......................................................................................................................................................19
TRANSACTION ORDERING...................................................................................................................20
PORT ARBITRATION ..............................................................................................................................20
FLOW CONTROL .....................................................................................................................................21
TRANSATION LAYER TRANSMIT BLOCK (TLP ENCAPSULATION) .............................................21
EEPROM INTERFACE .............................................................................................................................22
SMB
REGISTER TYPES ....................................................................................................................................31
TRANSPARENT MODE CONFIGURATION REGISTERS ....................................................................31
PH .......................................................................................................................................................19
PD .......................................................................................................................................................19
NPHD .................................................................................................................................................19
CPLH ..................................................................................................................................................19
CPLD ..................................................................................................................................................19
AUTO MODE EERPOM ACCESS .....................................................................................................22
EEPROM MODE AT RESET..............................................................................................................22
EEPROM SPACE ADDRESS MAP ....................................................................................................22
MAPPING EEPROM CONTENTS TO CONFIGURATION REGISTERS..........................................24
VENDOR ID REGISTER – OFFSET 00h ...........................................................................................33
DEVICE ID REGISTER – OFFSET 00h.............................................................................................33
COMMAND REGISTER – OFFSET 04h............................................................................................33
PRIMARY STATUS REGISTER – OFFSET 04h.................................................................................34
REVISION ID REGISTER – OFFSET 08h .........................................................................................34
CLASS CODE REGISTER – OFFSET 08h .........................................................................................34
CACHE LINE REGISTER – OFFSET 0Ch.........................................................................................35
US
INTERFACE .................................................................................................................................30
OF
128-PIN LQFP.......................................................................................................................15
Page 5 of 77
4Port-4Lane PCI Express® Switch
SlimLine
PI7C9X20404SL
Datasheet
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