PI7C9X20404SLCFDE Pericom Semiconductor, PI7C9X20404SLCFDE Datasheet - Page 31

• Manufacturer Part Number: PI7C9X20404SLCFDE
• Description: IC PCIE PACKET SWITCH 128LQFP
• Manufacturer: Pericom Semiconductor
• Series: SlimLine™r

Specifications of PI7C9X20404SLCFDE

• Applications: Data Transport
• Interface: Advanced Configuration Power Interface (ACPI)
• Package / Case: 128-LQFP
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Voltage - Supply: -

7
7.1
7.2
July 2009 – Revision 1.2
Pericom Semiconductor
REGISTER DESCRIPTION
REGISTER TYPES
When the port of switch is set to operate at the transparent mode, it is represented by a logical PCI-to-
PCI bridge that implements type 1 configuration space header. The following table details the
allocation of the register fields of the PCI 2.3 compatible type 1 configuration space header.
TRANSPARENT MODE CONFIGURATION REGISTERS
REGISTER TYPE
HwInt
RO
RW
RWC
RWCS
RWS
ROS
Secondary Latency
Prefetchable Memory Limit Address
Reserved
PM Data
31 –24
Power Management Capabilities
Timer
I/O Limit Address Upper 16-bit
Memory Limit Address
Length in Bytes (14h)
ACK Latency Timer
Secondary Status
Message Control
PHY Parameters
Primary Status
Bridge Control
VPD Register
Device ID
Reserved
Reserved
SSID
Prefetchable Memory Limit Address Upper 32-bit
Prefetchable Memory Base Address Upper 32-bit
Subordinate Bus
Header Type
PPB Support
Class Code
Extensions
23 – 16
Reserved
Number
DEFINITION
Hardware Initialization
Read Only
Read / Write
Read / Write 1 to Clear
Sticky - Read Only / Write 1 to Clear
Sticky - Read / Write
Sticky – Read Only
Message Upper Address
VPD Data Register
Message Address
XPIP_CSR0
XPIP_CSR1
XPIP_CSR2
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Reserved
Reserved
Reserved
Reserved
Pointer=E0
Secondary Bus Number
Primary Latency Timer
Next Item
Next Item Pointer=8C
Next Item Pointer=A4
Next Item Pointer=A4
Next Item Pointer=C0
I/O Limit Address
Interrupt Pin
Prefetchable Memory Base Address
15 - 8
I/O Base Address Upper 16-bit
Replay Time-out Counter
Power Management Data
Switch Operation Mode
Memory Base Address
Message Data
Vendor ID
Command
SSVID
4Port-4Lane PCI Express® Switch
Capability ID=0D
SSID/SSVID
Primary Bus Number
Capability Pointer to
I/O Base Address
Capability ID=01
Capability ID=05
Capability ID=03
Capability ID=09
Cache Line Size
Interrupt Line
Revision ID
7 –0
80h
SlimLine
PI7C9X20404SL
BYTE OFFSET
Datasheet
TM
40h – 7Fh
10h – 17h
ACh
A0h
A4h
A8h
BCh
0Ch
1Ch
2Ch
3Ch
8Ch
9Ch
B0h
B4h
B8h
C0h
C4h
00h
04h
08h
18h
20h
24h
28h
30h
34h
38h
80h
84h
90h
94h
98h
Family