MC68HC711K4CFN3 Freescale Semiconductor, MC68HC711K4CFN3 Datasheet - Page 112

• Manufacturer Part Number: MC68HC711K4CFN3
• Manufacturer: Freescale Semiconductor

Specifications of MC68HC711K4CFN3

• Cpu Family: HC11
• Device Core Size: 8b
• Frequency (max): 4MHz
• Interface Type: SCI/SPI
• Program Memory Type: ROM
• Program Memory Size: 24KB
• Total Internal Ram Size: 768Byte
• Number Of Timers - General Purpose: 8
• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 4.5V
• On-chip Adc: 8-chx8-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 84
• Package Type: PLCC
• Lead Free Status / Rohs Status: Not Compliant

Resets and Interrupts
5.3.4.2 System Configuration Options Register 2
Technical Data
112
1. Not available on M68HC11K devices
Address: $0038
LIRDV — LIR Driven Bit
CWOM — Port C Wired-OR Mode Bit
STRCH — Stretch External Accesses Bit
Reset:
Read:
Write:
Figure 5-5. System Configuration Options Register 2 (OPT2)
This bit allows power savings in expanded modes by turning off the
LIR output (it has no meaning in single-chip or bootstrap modes). The
LIR pin is driven low to indicate that execution of an instruction has
begun. To detect consecutive instructions in a high-speed application,
this signal drives high for a quarter of a cycle to prevent false
triggering. An external pullup is required in expanded modes, while a
hardwired V
reset to 0 in single-chip modes and to 1 in expanded modes.
For detailed information, refer to
When this bit is set, off-chip accesses of selected addresses are
extended by one E-clock cycle to allow access to slow peripherals.
The E clock stretches externally, but the internal clocks are not
affected, so that timers and serial systems are not corrupted. The
state of the ROMAD bit in the CONFIG register determines which
address range is affected.
Freescale Semiconductor, Inc.
For More Information On This Product,
1 = Enable LIR push-pull drive
0 = LIR not driven high on MODA/LIR pin
1 = Port C outputs are open drain.
0 = Port C operates normally.
1 = Off-chip accesses are selectively extended by one E-clock
0 = Normal operation
LIRDV
Bit 7
cycle.
0
Go to: www.freescale.com
SS
Resets and Interrupts
CWOM
connection is possible in single-chip modes. LIRDV is
6
0
STRCH
5
0
(1)
IRVNE
—
4
Section 6. Parallel
LSBF
3
0
SPR2
2
0
Input/Output.
M68HC11K Family
XDV1
1
0
MOTOROLA
XDV0
Bit 0
0