MC68HC711K4CFN3 Freescale Semiconductor, MC68HC711K4CFN3 Datasheet - Page 154
MC68HC711K4CFN3
Manufacturer Part Number
MC68HC711K4CFN3
Description
Manufacturer
Freescale Semiconductor
Datasheet
1.MC68HC711K4CFN3.pdf
(290 pages)
Specifications of MC68HC711K4CFN3
Cpu Family
HC11
Device Core Size
8b
Frequency (max)
4MHz
Interface Type
SCI/SPI
Program Memory Type
ROM
Program Memory Size
24KB
Total Internal Ram Size
768Byte
Number Of Timers - General Purpose
8
Operating Supply Voltage (typ)
5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
4.5V
On-chip Adc
8-chx8-bit
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
84
Package Type
PLCC
Lead Free Status / Rohs Status
Not Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MC68HC711K4CFN3
Manufacturer:
MOLEX
Quantity:
12 000
Part Number:
MC68HC711K4CFN3
Manufacturer:
MOTOROLA/摩托罗拉
Quantity:
20 000
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Serial Communications Interface (SCI)
Technical Data
154
Figure 7-3
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Freescale Semiconductor, Inc.
For More Information On This Product,
The overrun error (OR) flag is set instead of the RDRF bit when
the next byte is ready to be transferred from the receive shift
register to the RDR and the RDR is already full. The data in the
shift register is lost and the data that was already in RDR is not
disturbed.
The noise flag (NF) is set if there is noise on any of the received
bits, including the start and stop bits. The data recovery circuit
takes three samples of each bit and indicates noise if any set of
three samples is not unanimous. NF is not set until the entire
character is received and transferred to the RDR, when RDRF is
set.
The framing error (FE) flag is set when no stop bit is detected in
the received data character. FE is set at the same time as RDRF.
If the byte received causes both framing and overrun errors, the
processor only recognizes the overrun error. The framing error
flag inhibits further data transfer into the RDR until the flag is
cleared.
The parity error (PE) flag indicates that the parity bit of a received
character does not match the parity calculated by hardware.
The receiver active flag (RAF) is a read-only bit that is set during
data reception and cleared when the line goes idle. This is the only
flag cleared by hardware.
Serial Communications Interface (SCI)
is a block diagram of the SCI receiver.
Go to: www.freescale.com
M68HC11K Family
MOTOROLA
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