MC68HC711K4CFN3 Freescale Semiconductor, MC68HC711K4CFN3 Datasheet - Page 228

• Manufacturer Part Number: MC68HC711K4CFN3
• Manufacturer: Freescale Semiconductor

Specifications of MC68HC711K4CFN3

• Cpu Family: HC11
• Device Core Size: 8b
• Frequency (max): 4MHz
• Interface Type: SCI/SPI
• Program Memory Type: ROM
• Program Memory Size: 24KB
• Total Internal Ram Size: 768Byte
• Number Of Timers - General Purpose: 8
• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 4.5V
• On-chip Adc: 8-chx8-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 84
• Package Type: PLCC
• Lead Free Status / Rohs Status: Not Compliant

Analog-to-Digital (A/D) Converter
Technical Data
228
NOTE:
CCF — Conversions Complete Flag
SCAN — Continuous Scan Control Bit
MULT — Multiple Channel/Single Channel Control Bit
When the multiple-channel continuous scan mode is used, extra care is
needed in the design of circuitry driving the A/D inputs. The charge on
the capacitive DAC array before the sample time is related to the voltage
on the previously converted channel. A charge share situation exists
between the internal DAC capacitance and the external circuit
capacitance. Although the amount of charge involved is small, the rate
at which it is repeated is every 64 s for an E clock of 2 MHz. The RC
charging rate of the external circuit must be balanced against this charge
sharing effect to avoid errors in accuracy. Refer to the M68HC11
Reference Manual, Motorola document order number M68HC11RM/AD,
for further information.
CD:CA — Channel Selects D:A Bits
Set when all four A/D result registers contain valid conversion results.
Cleared when the ADCTL register is overwritten, starting a new
conversion sequence. In continuous mode, CCF is set at the end of
the first conversion sequence.
Refer to
least significant channel select bits (CB and CA) have no meaning
and the CD and CC bits specify which group of four channels is to be
converted.
Freescale Semiconductor, Inc.
For More Information On This Product,
0 = Conversion process stops after each of the four result registers
1 = Conversions are performed continuously.
0 = A single channel specified by the four channel select bits
1 = Each of four channels is converted and the results written to a
is written.
CD:CA is sampled and converted four times.
different result register.
Analog-to-Digital (A/D) Converter
Table
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10-1. In multiple channel mode (MULT = 1), the two
M68HC11K Family
MOTOROLA