PNX1501E NXP Semiconductors, PNX1501E Datasheet - Page 392

• Manufacturer Part Number: PNX1501E
• Description: Digital Signal Processors & Controllers (DSP, DSC) MEDIA PROCESSOR PNX15XX/266MHZ
• Manufacturer: NXP Semiconductors

Specifications of PNX1501E

• Product: DSPs
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Package / Case: SOT-795
• Minimum Operating Temperature: 0 C
• Lead Free Status / Rohs Status: Details
• Other names: PNX1501E,557

Philips Semiconductors
Volume 1 of 1
Table 19: Register Module Association
Table 20: QVCP 1 Registers
12NC 9397 750 14321
Product data sheet
Offset
0x10 E344
0x10 E348
0x10 E34C
0x10 E350
Bit
Screen Timing Generator Registers
Offset 0x10 E000
31:28
27:16
15:12
11:0
Offset 0x10 E004
31:28
27:16
15:12
11:0
Offset 0x10 E008
31:28
27:16
15:12
11:0
Offset 0x10 E00C
31:28
27:16
15:12
11:0
Offset 0x10 E010
31:28
Symbol
Unused
HTOTAL
Unused
VTOTAL
Unused
HBLANKS
Unused
HBLNKE
Unused
VBLANKS
Unused
VBLANKE
Unused
HSYNCS
Unused
HSYNCE
Unused
Layer Histogram control
Layer CFTR Blue
Layer CFTR Green
Layer DCTI Control
Symbol
5.2 Register Tables
TOTAL
HBLANK
VBLANK
HSYNC
VSYNC
Acces
s
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
…Continued
-
0
-
0
-
0
-
0
-
0
-
0
-
0
-
0
-
Value
Rev. 2 — 1 December 2004
Description
Horizontal Total sets the number of horizontal pixels for the display.
Total # of pixels per line = HTOTAL+1.
Vertical Total sets the number of vertical pixels for the display.
Total # of lines per frame = VTOTAL +1.
Total # of lines for odd field = VTOTAL +1.
Total # of lines for even field = VTOTAL +2
Horizontal Blank Start sets the pixel location where horizontal
blanking starts. Limitation: HTOTAL+2 >= HBLANKS >= 2.
Horizontal Blank End sets the pixel location where horizontal
blanking ends. Limitation: HTOTAL >= HBLNKE >=0.
Vertical Blank Start sets the pixel location where vertical blanking
starts. Limitation: VTOTAL+1 >=VBLANKS >=1.
Vertical Blank End sets the pixel location where vertical blanking
ends. Limitation: VTOTAL >= VBLANKE >=0.
Horizontal Sync Start sets the pixel location where horizontal sync
starts. Limitation: HTOTAL+2 >= HSYNCS >=2.
Horizontal Sync End sets the pixel location where horizontal sync
ends. Limitation: HTOTAL >= HSYNCE >=0.
© Koninklijke Philips Electronics N.V. 2002-2003-2004. All rights reserved.
PNX15xx Series
Module
HIST
CFTR
CFTR
DCTI
Chapter 11: QVCP
11-46