PNX1501E NXP Semiconductors, PNX1501E Datasheet - Page 86
PNX1501E
Manufacturer Part Number
PNX1501E
Description
Digital Signal Processors & Controllers (DSP, DSC) MEDIA PROCESSOR PNX15XX/266MHZ
Manufacturer
NXP Semiconductors
Datasheet
1.PNX1501E.pdf
(819 pages)
Specifications of PNX1501E
Product
DSPs
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Package / Case
SOT-795
Minimum Operating Temperature
0 C
Lead Free Status / Rohs Status
Details
Other names
PNX1501E,557
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Philips Semiconductors
Volume 1 of 1
Table 4: TM3260 Characteristics
6. MPEG Decoding
7. Image Processing
12NC 9397 750 14321
Product data sheet
TM3260 VLIW CPU Features
System Interface
Software
Development
Environment
Application Software
Architecture
6.1 VLD
6.2 DVD De-scrambler
7.1 Pixel Format
The TM3260 runs asynchronously with respect to system DRAM, and can operate at a frequency
lower than system DRAM to save power, or higher than system DRAM to gain performance
The TM3260 is supported by the advanced C/C++ compiler tools available for the PNX1300 Series
family
Applications use the TSSA, Trimedia Streaming Software Architecture, allowing modular
development of audio, video processing functions
The TM3260 processes the audio, video and the stream de-multiplexing via software.
The Variable Length decoding as well as the authentication and the de-scrambling
are supported by two coprocessors.
The PNX15xx Series VLD is an MPEG-1 and MPEG-2 parser that writes to memory
a separate data structure for macro block header and coefficient information. It is
capable of sustaining an ATSC (High Definition) bitrate. It off-loads the CPU in
applications involving MPEG-2 decoding or transcoding. Low to medium bitrate VLD
decoding, as well as VLC encoding may be done by the TM3260 CPU. MPEG-2 HD
decoding by the CPU is not supported due to CPU and system limitations.
The DVD-CSS module is provided to allow integrated DVD playback capability.
It provides authentication and de-scrambling for DVDs. A DVD drive can be attached
to the integrated medium-bandwidth IDE controller, and provides its data either
across the IDE interface or across a multi bit serial interface to the GPIO pins. The
resulting system memory scrambled program stream is de-scrambled by invoking a
memory to memory operation on the DVD-CSS module. The ‘cleartext’ program
stream is then de-multiplexed by software on the TM3260.
More detailed Information available on (legal) request
The on-chip hardware image processing modules all use the same ‘native’ pixel
formats, as shown in
can be read by another module.
•
A limited number of native pixel formats are supported by all image subsystems,
as appropriate.
Rev. 2 — 1 December 2004
Table
5. This ensures that image data produced by one module
© Koninklijke Philips Electronics N.V. 2002-2003-2004. All rights reserved.
PNX15xx Series
Chapter 2: Overview
2-12
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