PNX1501E NXP Semiconductors, PNX1501E Datasheet - Page 709

• Manufacturer Part Number: PNX1501E
• Description: Digital Signal Processors & Controllers (DSP, DSC) MEDIA PROCESSOR PNX15XX/266MHZ
• Manufacturer: NXP Semiconductors

Specifications of PNX1501E

• Product: DSPs
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Package / Case: SOT-795
• Minimum Operating Temperature: 0 C
• Lead Free Status / Rohs Status: Details
• Other names: PNX1501E,557

Philips Semiconductors
Volume 1 of 1
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Product data sheet
5.5.4 Update ProduceIndex
5.5.5 Write Reception Status
5.5.6 Reception Error Handling
Ethernet hardware will set the RxFinishedInt bit of the IntStatus register. The Receive
Datapath will still be enabled. If the receive FIFO is full, any new receive data will
generate an overflow error and interrupt the CPU.
Each time the Rx DMA manager commits fragment data and the associated status
word to memory, it completes the reception of a descriptor and it increments the
RxProduceIndex (taking wrap-around into account) and hands the descriptor back to
the device driver software. Software can re-use the descriptor for new reception by
handing it back to hardware when the receive data has been processed.
The device driver software can keep track of the progress of the DMA manager by
reading the RxProduceIndex register to see how far along the receive process is.
When the Rx descriptor FIFO is emptied completely, the RxProduceIndex retains its
last value.
After the packet has been received from the MII Interface, the StatusInfo and
StatusTimeStamp words of the packet descriptor are updated by the DMA manager.
If the descriptor is for the last fragment of a packet (or for the whole packet if there are
no fragments), then, depending on the success or failure of packet reception, error
flags (Error, NoDescriptor, Overrun, AlignmentError, RangeError, LengthError,
SymbolError, and CRCError) are set in the status word. The EntryLevel field is set to
the number of bytes actually written to the fragment buffer, –1-encoded. For
fragments that are not the last in the packet, the EntryLevel will match the size of the
buffer. The current time-stamp time is written to the StatusTimeStamp field. If the
reception reports an error, any remaining data in the receive packet is discarded and
the Last bit will be set in the receive status field so the error flags in all but the last
fragment of a packet will always be 0.
The status of the last receive packet can also be inspected by reading the RSV
register. The register does not report statuses on a fragment basis and does not store
information about previously received packets.
When an error occurs during the receive process, the Rx DMA manager will report
the error via the receive status word written in the Status FIFO and the IntStatus
interrupt status register.
The receive process can generate several types of errors, including: AlignmentError,
RangeError, LengthError, SymbolError, CRCError, Overrun, and NoDescriptor. All
have corresponding bits in the receive status word. In addition to this, AlignmentError,
RangeError, LengthError, SymbolError, CRCError are ORed together into the Error
bit of the status word. Errors are also propagated to the IntStatus register. The
RxError bit in the IntStatus register is set in case of a AlignmentError, RangeError,
LengthError, SymbolError, CRCError, and NoDescriptor error; fatal Overrun errors
are report in the RxOverrun bit of the IntStatus register. On fatal overrun errors the Rx
datapath needs to be soft rest by setting the Command.RxReset bit.
Overrun errors can have three causes:
Rev. 2 — 1 December 2004
Chapter 23: LAN100 — Ethernet Media Access Controller
© Koninklijke Philips Electronics N.V. 2002-2003-2004. All rights reserved.
PNX15xx Series
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