AT32UC3C2256C Atmel Corporation, AT32UC3C2256C Datasheet - Page 1027

• Manufacturer Part Number: AT32UC3C2256C
• Manufacturer: Atmel Corporation

Specifications of AT32UC3C2256C

• Flash (kbytes): 256 Kbytes
• Pin Count: 64
• Max. Operating Frequency: 66 MHz
• Cpu: 32-bit AVR
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 45
• Ext Interrupts: 64
• Usb Transceiver: 1
• Quadrature Decoder Channels: 1
• Usb Speed: Full Speed
• Usb Interface: Device + OTG
• Spi: 5
• Twi (i2c): 2
• Uart: 4
• Can: 2
• Lin: 4
• Ssc: 1
• Ethernet: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 11
• Adc Resolution (bits): 12
• Adc Speed (ksps): 2000
• Analog Comparators: 2
• Resistive Touch Screen: No
• Dac Channels: 2
• Dac Resolution (bits): 12
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 68
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 3.0 to 3.6 or 4.5 to 5.5
• Operating Voltage (vcc): 3.0 to 3.6 or 4.5 to 5.5
• Fpu: Yes
• Mpu / Mmu: Yes / No
• Timers: 3
• Output Compare Channels: 13
• Input Capture Channels: 6
• Pwm Channels: 14
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

33.7.30
Name:
Access Type:
Offset:
Reset Value:
• WPKEY: Write Protect Key
• WPRGx: Write Protect Register Group x
• WPCMD: Write Protect Command
This command is performed only if the WPKEY value is correct.
Note:
List of register groups:
32117C–AVR-08/11
• Register group 0:
• Register group 1:
• Register group 2:
• Register group 3:
WPRG5
–
–
–
–
–
31
23
15
7
”Clock Register” on page 996
”Disable Register” on page 999
”Sync Channels Mode Register” on page 1005
”Channel Mode Register” on page 1035
”Stepper Motor Mode Register” on page 1026
Should be written at value 0x50574D (“PWM” in ASCII). Writing any other value in this field aborts the write operation of the
WPCMD field. Always reads as 0.
Writing a zero to this bit has no effect.
Writing a one to this bit will allow to set the WPCMD command to the register group x.
0: Disable the Write Protect SW of the register groups of which the WPRGx bit is set to 1.
1: Enable the Write Protect SW of the register groups of which the WPRGx bit is set to 1.
2: Enable the Write Protect HW of the register groups of which the WPRGx bit is set to 1.
3: No effect.
Only a hardware reset of the PWM controller can disable the Write Protect HW.
Write Protect Control Register
WPRG4
30
22
14
6
WPCR
Write-only
0x0E4
-
WPRG3
29
21
13
5
WPRG2
28
20
12
4
WPKEY
WPKEY
WPKEY
WPRG1
27
19
11
3
WPRG0
26
18
10
2
25
17
9
1
WPCMD
AT32UC3C
24
16
8
0
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