AT32UC3C2256C Atmel Corporation, AT32UC3C2256C Datasheet - Page 602

• Manufacturer Part Number: AT32UC3C2256C
• Manufacturer: Atmel Corporation

Specifications of AT32UC3C2256C

• Flash (kbytes): 256 Kbytes
• Pin Count: 64
• Max. Operating Frequency: 66 MHz
• Cpu: 32-bit AVR
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 45
• Ext Interrupts: 64
• Usb Transceiver: 1
• Quadrature Decoder Channels: 1
• Usb Speed: Full Speed
• Usb Interface: Device + OTG
• Spi: 5
• Twi (i2c): 2
• Uart: 4
• Can: 2
• Lin: 4
• Ssc: 1
• Ethernet: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 11
• Adc Resolution (bits): 12
• Adc Speed (ksps): 2000
• Analog Comparators: 2
• Resistive Touch Screen: No
• Dac Channels: 2
• Dac Resolution (bits): 12
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 68
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 3.0 to 3.6 or 4.5 to 5.5
• Operating Voltage (vcc): 3.0 to 3.6 or 4.5 to 5.5
• Fpu: Yes
• Mpu / Mmu: Yes / No
• Timers: 3
• Output Compare Channels: 13
• Input Capture Channels: 6
• Pwm Channels: 14
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

25.6.9
25.6.9.1
25.6.9.2
25.6.9.3
25.6.9.4
25.6.9.5
32117C–AVR-08/11
LIN Mode
Modes of operation
Baud Rate Configuration
Receiver and Transmitter Control
Character Transmission
Character Reception
The LIN Mode provides Master node and Slave node connectivity on a LIN bus.
The LIN (Local Interconnect Network) is a serial communication protocol which efficiently sup-
ports the control of mechatronic nodes in distributed automotive applications.
The main properties of the LIN bus are:
LIN provides cost efficient bus communication where the bandwidth and versatility of CAN are
not required.
The LIN Mode enables processing LIN frames with a minimum of action from the
microprocessor.
The USART can act either as a LIN Master node or as a LIN Slave node.
The node configuration is chosen by setting the MODE field in the Mode Register (MR):
In order to avoid unpredicted behavior, any change of the LIN node configuration must be fol-
lowed by a software reset of the transmitter and of the receiver (except the initial node
configuration after a hardware reset). (See
See Section “25.6.1.1” on page 567.
See Section “25.6.2” on page 571.
See Section “25.6.3.1” on page 572.
See Section “25.6.3.7” on page 580.
• Single Master/Multiple Slaves concept
• Low cost silicon implementation based on common UART/SCI interface hardware, an
• Self synchronization without quartz or ceramic resonator in the slave nodes
• Deterministic signal transmission
• Low cost single-wire implementation
• Speed up to 20 Kbit/s
• LIN Master Node (MODE=0xA)
• LIN Slave Node (MODE=0xB)
• LIN Master Node: the baud rate is configured in the Baud Rate Generator Register (BRGR).
• LIN Slave Node: the initial baud rate is configured in BRGR, this configuration is
equivalent in software, or as a pure state machine.
automatically copied in the LIN Baud Rate Register (LINBRR) when writing BRGR. After
synchronization procedure, the baud rate is updated in LINBRR.
Section
25.6.9.3)
AT32UC3C
602