AT32UC3C2256C Atmel Corporation, AT32UC3C2256C Datasheet - Page 1152

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AT32UC3C2256C

Manufacturer Part Number
AT32UC3C2256C
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of AT32UC3C2256C

Flash (kbytes)
256 Kbytes
Pin Count
64
Max. Operating Frequency
66 MHz
Cpu
32-bit AVR
Hardware Qtouch Acquisition
No
Max I/o Pins
45
Ext Interrupts
64
Usb Transceiver
1
Quadrature Decoder Channels
1
Usb Speed
Full Speed
Usb Interface
Device + OTG
Spi
5
Twi (i2c)
2
Uart
4
Can
2
Lin
4
Ssc
1
Ethernet
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
11
Adc Resolution (bits)
12
Adc Speed (ksps)
2000
Analog Comparators
2
Resistive Touch Screen
No
Dac Channels
2
Dac Resolution (bits)
12
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
68
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
3.0 to 3.6 or 4.5 to 5.5
Operating Voltage (vcc)
3.0 to 3.6 or 4.5 to 5.5
Fpu
Yes
Mpu / Mmu
Yes / No
Timers
3
Output Compare Channels
13
Input Capture Channels
6
Pwm Channels
14
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes

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37.6.2.2
37.6.2.3
32117C–AVR-08/11
Low Power mode
Calibration
CLK_DACIFB
TCR.PRESC[2:0]
Figure 37-2. DAC Timing Counters
In order to reduce the power consumption during DAC conversions, the DAC Low Power mode
may be enabled. In low power mode, the DAC is turned off between each conversion.
Conversion time will be longer if new conversions are started in this mode: a fourfold increase of
the DAC’s output settling time should be expected.
To achieve optimal accuracy, it is possible to calibrate both gain (GOC.GCR) and offset error
(GOC.OCR) in the DAC. The MSB of the GCR and OCR fields is the sign bit.
Gain and Offset are not calibrated automatically and this must be done by software. To perform
this operation, the DAC internal output must be beforehand routed to the ADC using the CR.IE
bit.
The test values converted by the DAC are sampled by the ADC which returns a measured value
of the DAC output. Calculating the difference between a series of DACIFB channel input values
and their respective effective levels after conversion makes it possible to deduce both DAC gain
and offset biases.
To get the best calibration result, it is recommended to use the same AREF voltage, output
channel selection, sampling time, and refresh interval when calibrating as in normal DAC
operation.
Including errors, the DAC output value can be expressed as:
Prescaler
Timing Counter
TRA.TCD[7:0]
PrescalerClock
Timing Counter
TRB.TCD[7:0]
Refresh Counter
TCR.CHRA[3:0]
Refresh Counter
TCR.CHRB[3:0]
Channel Interval
TCR.CHI[6:0]
AT32UC3C
Counter
1152

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