AT32UC3C2256C Atmel Corporation, AT32UC3C2256C Datasheet - Page 615

• Manufacturer Part Number: AT32UC3C2256C
• Manufacturer: Atmel Corporation

Specifications of AT32UC3C2256C

• Flash (kbytes): 256 Kbytes
• Pin Count: 64
• Max. Operating Frequency: 66 MHz
• Cpu: 32-bit AVR
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 45
• Ext Interrupts: 64
• Usb Transceiver: 1
• Quadrature Decoder Channels: 1
• Usb Speed: Full Speed
• Usb Interface: Device + OTG
• Spi: 5
• Twi (i2c): 2
• Uart: 4
• Can: 2
• Lin: 4
• Ssc: 1
• Ethernet: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 11
• Adc Resolution (bits): 12
• Adc Speed (ksps): 2000
• Analog Comparators: 2
• Resistive Touch Screen: No
• Dac Channels: 2
• Dac Resolution (bits): 12
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 68
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 3.0 to 3.6 or 4.5 to 5.5
• Operating Voltage (vcc): 3.0 to 3.6 or 4.5 to 5.5
• Fpu: Yes
• Mpu / Mmu: Yes / No
• Timers: 3
• Output Compare Channels: 13
• Input Capture Channels: 6
• Pwm Channels: 14
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

Figure 25-47. Master Node Configuration, NACT=IGNORE
25.6.11.2
32117C–AVR-08/11
TXRDY
RXRDY
LINTC
LINIR
Write
Slave Node Configuration
Break
Header
IMPORTANT: if the NACT configuration for this frame is PUBLISH, the US_LINMR register,
must be write with NACT=PUBLISH even if this field is already correctly configured, that in order
to set the TXREADY flag and the corresponding Peripheral DMA Controller write transfer
request.
What comes next depends on the NACT configuration:
Synch
• Write TXEN and RXEN in CR to enable both the transmitter and the receiver.
• Write MODE in MR to select the LIN mode and the Slave Node configuration.
• Write CD and FP in BRGR to configure the baud rate.
• Wait until LINID in CSR rises
• Check LINISFE and LINPE errors
• Read IDCHR in RHR
• Write NACT, PARDIS, CHKDIS, CHKTYPE, DLCM and DLC in LINMR to configure the frame
• Case 1: NACT = PUBLISH, the USART sends the response
• Case 2: NACT = SUBSCRIBE, the USART receives the response
transfer.
– Wait until TXRDY in CSR rises
– Write TCHR in THR to send a byte
– If all the data have not been written, redo the two previous steps
– Wait until LINTC in CSR rises
– Check the LIN errors
– Wait until RXRDY in CSR rises
– Read RCHR in RHR
– If all the data have not been read, redo the two previous steps
– Wait until LINTC in CSR rises
– Check the LIN errors
Protected
Identifier
Data3
Response
space
Frame slot = TFrame_Maximum
Frame
Data 1
Response
Data N-1
Data N
Checksum
AT32UC3C
FSDIS=1
space
frame
Inter-
FSDIS=0
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