AT32UC3C2256C Atmel Corporation, AT32UC3C2256C Datasheet - Page 927

• Manufacturer Part Number: AT32UC3C2256C
• Manufacturer: Atmel Corporation

Specifications of AT32UC3C2256C

• Flash (kbytes): 256 Kbytes
• Pin Count: 64
• Max. Operating Frequency: 66 MHz
• Cpu: 32-bit AVR
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 45
• Ext Interrupts: 64
• Usb Transceiver: 1
• Quadrature Decoder Channels: 1
• Usb Speed: Full Speed
• Usb Interface: Device + OTG
• Spi: 5
• Twi (i2c): 2
• Uart: 4
• Can: 2
• Lin: 4
• Ssc: 1
• Ethernet: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 11
• Adc Resolution (bits): 12
• Adc Speed (ksps): 2000
• Analog Comparators: 2
• Resistive Touch Screen: No
• Dac Channels: 2
• Dac Resolution (bits): 12
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 68
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 3.0 to 3.6 or 4.5 to 5.5
• Operating Voltage (vcc): 3.0 to 3.6 or 4.5 to 5.5
• Fpu: Yes
• Mpu / Mmu: Yes / No
• Timers: 3
• Output Compare Channels: 13
• Input Capture Channels: 6
• Pwm Channels: 14
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

32.7.2.8
Register Name:
Access Type:
Offset:
Reset Value:
• EPENn: Endpoint n Enable
Note:
32117C–AVR-08/11
EPEN7
31
23
15
7
-
-
-
1. EPENn bits are within the range from EPEN0 to EPEN6.
Writing a zero to this bit will disable the endpoint n (USB requests will be ignored), and resets the endpoints registers (UECFGn,
UESTAn, UECONn), but not the endpoint configuration (EPBK, EPSIZE, EPDIR, EPTYPE).
Writing a one to this bit will enable the endpoint n.
0: The endpoint n is disabled.
1: The endpoint n is enabled.
(1)
Endpoint Enable/Reset Register
EPEN6
30
22
14
6
-
-
-
UERST
Read/Write
0x001C
0x00000000
(1)
EPEN5
29
21
13
5
-
-
-
(1)
EPEN4
28
20
12
4
-
-
-
(1)
EPEN3
27
19
11
3
-
-
-
(1)
EPEN2
26
18
10
2
-
-
-
(1)
EPEN1
25
17
9
1
-
-
-
(1)
AT32UC3C
EPEN8
EPEN0
24
16
8
0
-
-
(1)
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