ATmega1284RZAP Atmel Corporation, ATmega1284RZAP Datasheet - Page 18

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ATmega1284RZAP

Manufacturer Part Number
ATmega1284RZAP
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of ATmega1284RZAP

Flash (kbytes)
128 Kbytes
Max. Operating Frequency
20 MHz
Max I/o Pins
32
Spi
3
Twi (i2c)
1
Uart
2
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Crypto Engine
No
Sram (kbytes)
16
Eeprom (bytes)
4096
Operating Voltage (vcc)
1.8 to 3.6
Timers
3
Frequency Band
2.4 GHz
Max Data Rate (mb/s)
0.25
Antenna Diversity
No
External Pa Control
No
Power Output (dbm)
3
Receiver Sensitivity (dbm)
-101
Receive Current Consumption (ma)
16.0
Transmit Current Consumption (ma)
17.0
Link Budget (dbm)
104
6.3.1
8059D–AVR–11/09
Data Memory Access Times
The 32 general purpose working registers, 64 I/O registers, 160 Extended I/O Registers and the
16K bytes of internal data SRAM in the ATmega1284P are all accessible through all these
addressing modes. The Register File is described in
10.
Figure 6-2.
This section describes the general access timing concepts for internal memory access. The
internal data SRAM access is performed in two clk
Figure 6-3.
Address
clk
Data Memory Map
On-chip Data SRAM Access Cycles
Data
Data
WR
CPU
RD
Compute Address
160 Ext I/O Reg.
64 I/O Registers
Data Memory
Internal SRAM
32 Registers
T1
Memory Access Instruction
(16K x 8)
Address valid
CPU
T2
”General Purpose Register File” on page
cycles as described in
$40FF
$0000 - $001F
$0100
$0020 - $005F
$0060 - $00FF
Next Instruction
ATmega1284P
T3
Figure
6-3.
18

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