SAM9RL64 Atmel Corporation, SAM9RL64 Datasheet - Page 14

• Manufacturer Part Number: SAM9RL64
• Manufacturer: Atmel Corporation

Specifications of SAM9RL64

• Flash (kbytes): 0 Kbytes
• Pin Count: 217
• Max. Operating Frequency: 240 MHz
• Cpu: ARM926
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 118
• Ext Interrupts: 118
• Usb Transceiver: 1
• Usb Speed: Hi-Speed
• Usb Interface: Device
• Spi: 1
• Twi (i2c): 2
• Uart: 5
• Ssc: 2
• Sd / Emmc: 1
• Graphic Lcd: Yes
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 6
• Adc Resolution (bits): 10
• Adc Speed (ksps): 220
• Resistive Touch Screen: Yes
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 64
• Self Program Memory: NO
• External Bus Interface: 1
• Dram Memory: sdram
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 1.08 to 1.32
• Fpu: No
• Mpu / Mmu: No / Yes
• Timers: 3
• Output Compare Channels: 3
• Input Capture Channels: 3
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

Preface
About this document
Intended audience
Using this manual
xiv
This document is the technical reference manual for the ARM9E-S.
This document has been written for hardware and software engineers who want to
design or develop products based upon the ARM9E-S family of processors. It assumes
no prior knowledge of ARM products.
This document is organized into the following chapters:
Chapter 1 Introduction
Chapter 2 Programmer’s Model
Chapter 3 Device Reset
Chapter 4 Memory Interface
Chapter 5 Interrupts
Chapter 6 Coprocessor Interface
Chapter 7 Debug Interface and EmbeddedICE-RT
Copyright © 2000 ARM Limited. All rights reserved.
Read this chapter for an introduction to the ARM9E-S, and for a
summary of the ARM9E-S instruction set.
Read this chapter for a description of the programmer’s model for the
ARM9E-S.
Read this chapter for a description of the reset behavior of the ARM9E-S.
Read this chapter for a description of the memory interface, including
descriptions of the instruction and data interfaces.
Read this chapter for a description of interrupt operation. The chapter
includes interrupt latency details.
Read this chapter for a description of the coprocessor interface. The
chapter includes timing diagrams for coprocessor operations.
Read this chapter for an overview of the debug interface and the
EmbeddedICE-RT logic.
ARM DDI 0165B