SAM9RL64 Atmel Corporation, SAM9RL64 Datasheet - Page 253

• Manufacturer Part Number: SAM9RL64
• Manufacturer: Atmel Corporation

Specifications of SAM9RL64

• Flash (kbytes): 0 Kbytes
• Pin Count: 217
• Max. Operating Frequency: 240 MHz
• Cpu: ARM926
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 118
• Ext Interrupts: 118
• Usb Transceiver: 1
• Usb Speed: Hi-Speed
• Usb Interface: Device
• Spi: 1
• Twi (i2c): 2
• Uart: 5
• Ssc: 2
• Sd / Emmc: 1
• Graphic Lcd: Yes
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 6
• Adc Resolution (bits): 10
• Adc Speed (ksps): 220
• Resistive Touch Screen: Yes
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 64
• Self Program Memory: NO
• External Bus Interface: 1
• Dram Memory: sdram
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 1.08 to 1.32
• Fpu: No
• Mpu / Mmu: No / Yes
• Timers: 3
• Output Compare Channels: 3
• Input Capture Channels: 3
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

C.5.5
ARM DDI 0165B
Scan chains 1 and 2
The scan chain present between DBGSDIN and DBGSDOUT is connected between
DBGTDI and DBGTDO whenever scan chain 3 is selected, or when any unassigned
scan chain number is selected. If there is more than one external scan chain, a
multiplexor must be built externally to apply the desired scan chain output to
DBGSDOUT. The multiplexor can be controlled by decoding DBGSCREG[4:0].
The scan chains allow serial access to the core logic and to the EmbeddedICE hardware
for programming purposes. Each scan chain cell is simple, and comprises a serial
register and a multiplexor. A typical cell is shown in Figure C-4.
Copyright © 2000 ARM Limited. All rights reserved.
CLK
Serial data in
Table C-2 Scan chain number allocation (continued)
enable
Shift
0
1
Scan chain
number
3
4–15
16–31
Figure C-4 Typical scan chain cell
Serial data out
Test mode
Function
External boundary
scan
Reserved
Unassigned
select
0
1
Debug in depth
C-13