T8531A/T8532 Agere Systems, Inc., T8531A/T8532 Datasheet - Page 19

• Manufacturer Part Number: T8531A/T8532
• Description: Multichannel Programmable Codec Chip Set
• Manufacturer: Agere Systems, Inc.

May 2001
Chip Set Functional Description
(continued)
DSP Engine Timing
Microprocessor Start-Up of the DSP Engine
Once the interrupt system is enabled, the DSP engine
looks for a read or write interrupt from the microproces-
sor interface once every time segment, i.e., 16 times a
frame.
If the ac coefficients for every channel are to be inde-
pendently controlled, the microprocessor can write
directly to the addresses of the 16 ac coefficient tables.
This requires a total of 16 microprocessor commands
to set up each channel, i.e., 16 frames to set up all
16 channels. Prior to activating any time slots, the
microprocessor has the option of bulk downloading the
coefficients to set up the ac coefficient tables.
When a channel needs to be set up and linked to its
time slot, the microprocessor must send the TCW for
that time slot with the modify coefficient (MC) bit (see
Table 5A). The MC bit causes the inactive routine for
that time slot to set pointers from that time-slot space to
the channel space in RAM. The MC bit also causes the
inactive routine to check the default coefficient bits of
the TCW. If set, the appropriate default table coeffi-
cients are copied over to the RAM space for the chan-
nel. This mechanism allows the microprocessor to
download a set of coefficients that can be used by mul-
tiple channels.
A mix-and-match approach can be used, i.e., some
channels are set up with independent sets of coeffi-
cients, while other channels get a default setting.
During start-up, the microprocessor must also down-
load the 16 TSA commands used by the TSA block to
map physical channels to time slots. This is required to
initialize the TSA RAM to known values. When all 16
locations have been set up, the microprocessor must
send BCW2 (0x1FFC). This flags the TSA control to
start normal operation.
Powering Up a Time Slot in the T8531
Depending on the application, the microprocessor may
choose to set up the ac coefficients for a channel just
prior to enabling it for use. This requires 16 micropro-
cessor commands if the coefficients must be set up
from scratch, or no commands if an appropriate default
set has already been set up. In either case, the micro-
processor must ensure that all the TX and RX parts of
a channel are set up prior to enabling the time slot.
Agere Systems Inc.
(continued)
If dynamic time-slot assignment is used, the micropro-
cessor must next download a TSA command, which
the TSA block uses to map the time slot to the required
channel number.
The microprocessor must enable the time slot by set-
ting the go to powerup bit of the TCW. This causes the
DSP engine to change the TX and RX ac routine
addresses to active.
A maximum of 17 commands or a minimum of one
command is therefore needed to power up a channel.
Disabling a Time Slot in the T8531
To disable a time slot, the microprocessor must send a
command that sets the address of either the TX or RX
ac routine to TX_inactive and RX_inactive, respec-
tively.
The inactive routines come into use in the next TX or
RX time segment for this time slot. Upon returning from
the inactive routine, the DSP engine checks for a
microprocessor interrupt and then enters sleep mode
for the rest of the time segment.
T8532 Powerup/Powerdown
Each channel can be powered up independently. There
are two control register addresses that can be used to
control the power for each channel. In both cases, the
first bit of the address word controls the power. P = 1
for powerup, and P = 0 for powerdown.
One address is provided for each channel which
controls the power (0x1508—0x150F and
0x1548—0x154F), and the address is followed by a
data word which controls the other programmable
functions for the same channel. A second address
(0x1500—0x1507 and 0x1540—0x1547) is provided
for each channel that controls only the power.
Codec Chip Set
19