T8531A/T8532 Agere Systems, Inc., T8531A/T8532 Datasheet - Page 42

• Manufacturer Part Number: T8531A/T8532
• Description: Multichannel Programmable Codec Chip Set
• Manufacturer: Agere Systems, Inc.

Codec Chip Set
Software Interface
Table 41 shows the memory map for the DSP engine ROM. The ROM information is not accessible via the micro-
processor. The total ROM size is 8 Kwords.
Table 41. DSP Engine ROM Memory Map
42
Address Range
0x0FFE
0x000B
0x03B0
0x03B8
0x07A0
0x0A80
0x0B00
0x0B60
0x0B80
0x0C00
0x0E00
0x0003
0x0008
0x0380
0x0400
0x0500
0x0503
0x0600
0x0610
0x0680
0x0690
0x0700
0x0720
0x0860
0x0F00
0x0F10
0x0F20
0x0F30
0x0F40
0x0F60
HDS interrupt service routine
Time-slot sync interrupt service routine
Start-up routine
Time segment controller (ts_proc)
Double precision multiply routine
Double precision multiply routine
Transmit path active routine
Receive path active routine
RX path active without reading from the system interface
Transmit path inactive/loopback routine
Transmit path inactive routine
Receive path inactive/loopback routine
Receive path inactive routine
Self-test pass 1 setup (TX)
Self-test pass 2 setup (RX)
Tone generation start-up
Tone detection start-up
Variance calculation
Peak detection routine
dc generation
ROM checker
RAM checker
Variance calculation with TX filters
Simultaneous start-up of tone generator and DFT routine
Simultaneous start-up of tone generator and original variance routine
Routine places TX and RX halves of a time slot into inactive loopback
Places TX and RX halves of a time slot into inactive routine
Routine for copying values in channel coefficient table 0 to all 16-channel tables
Approximate location of HDS code
Checksum for ROM 0x0000 : 0x07FF
(continued)
Memory Contents
Agere Systems Inc.
May 2001