T8531A/T8532 Agere Systems, Inc., T8531A/T8532 Datasheet - Page 41

• Manufacturer Part Number: T8531A/T8532
• Description: Multichannel Programmable Codec Chip Set
• Manufacturer: Agere Systems, Inc.

May 2001
Agere Systems Inc.
Software Interface
Table 35. Bits 15:9 of T8531A Board Control Word 2 at 0x1FFC
Table 36. Bits 8:0 of T8531A Board Control Word 2 at 0x1FFC
Note: Bits 15 through 9 are not used; assumed to be zeros. BOF[8:0] provide a fixed offset, relative to the frame synchronization strobe (SFS),
Table 37. Bits 15:0 of T8531A Board Control Word 3 at 0x1FFA
Note: For test use only, do not use in normal operation. The default value after hardware reset or powerup is 0.
Table 38. Bits 15:0 of T8531A Board Control Word 4 at 0x1FF8
Note: The default value after hardware reset or powerup is A4.
Table 39. Bits 15:0 of T8531A Board Control Word 5 at 0x1FF6
Note: The default value after hardware reset or powerup is 0.
Table 40. Bits 15:0 of T8531A Reset of Microprocessor Commands at 0x7FFF
15
1
BOF8
Bit Number and Function
8
for the first bit transmitted in each time slot. The offset is the number of data periods by which transmission of the first bit on SDX is
delayed. All subsequent transmissions also follow this offset. The default value after hardware reset or powerup is 1A3; however, this reg-
ister must still be written after reset.
14
1
Not used
13
BOF7
1
15—9
7
12
1
Not used
Not used
Not used
15—10
15—5
15—8
11
BOF6
1
6
(continued)
10
1
Bit Number
Bit Number and Function
Bit Number and Function
Bit Number and Function
9
1
BOF5—3
5, 4, 3
Bit Number
8
1
7
1
BOF2
6
1
2
5
1
CTZ alpha coefficients
CTZ beta coefficients
BOF1
4
1
1
TZ test bits
3
1
4—0
9—0
7—0
BOF0
2
1
0
1
1
0
1
BOF8—0 = Bit offset in binary
Clear address and data words
Function
Function
in T8531
Codec Chip Set
41