T8531A/T8532 Agere Systems, Inc., T8531A/T8532 Datasheet - Page 5

• Manufacturer Part Number: T8531A/T8532
• Description: Multichannel Programmable Codec Chip Set
• Manufacturer: Agere Systems, Inc.

May 2001
Agere Systems Inc.
General Description
T8531A Description
As shown in Figure 4, the T8531A contains a digital signal processor (DSP) engine surrounded by a customized
input/output (I/O) frame. The I/O frame performs the -law or A-law conversion as well as the decimation and inter-
polation functions needed to interface the sigma-delta bit streams to the digital signal processor engine. The
sigma-delta converters operate at a 1.024 MHz sample rate, while the signal processor operates at 16 ksamples/s.
A key function of the I/O frame is to control the timing of the digital data going to the signal processor so that group
delay is minimized.
The I/O frame also contains an integrated phase-locked loop which synthesizes all the required internal clocks for
the chip set.
The microcontroller interface is used to run the ROM routines and to download the gain, filter, and balance network
settings, powerup/powerdown commands, time-slot assignments, digital loopback settings, and commands for the
T8532 octal chips.
JTAG
HDS
T8532 OVERSAMPLED INTERFACE
DECIMATOR
SYNTHESIZER
CLOCK
PLL
(continued)
OSDX/R[3:0]
PROCESSING
DIGITAL
ENGINE
SIGNAL
Figure 4. T8531A Block Diagram
SYSTEM PCM INTERFACE
INTERPOLATOR
/A-LAW CONVERTER
DATA TRANSFER
ROM
RAM
DSP
DSP
T8532 CONTROL INTERFACE
PROCESSOR
INTERFACE
CONTROL
MICRO-
TSA
Codec Chip Set
UPCS
UPCK
UPDI
UPDO
HIGHZB
RSTB
T_SYNC
TSTCLK
TEST
V
V
DD
SS
0505(F)
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