cy28rs600-2 SpectraLinear Inc, cy28rs600-2 Datasheet - Page 2

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cy28rs600-2

Manufacturer Part Number
cy28rs600-2
Description
Clock Generator For Ati Rs5xx, 6xx Chipsets
Manufacturer
SpectraLinear Inc
Datasheet
Rev 1.0, November 22, 2006
Pin Description
14, 21, 24, 38
15, 20, 25, 39
12, 13, 16,
17, 18, 19,
20, 22, 23,
27, 28, 29,
30, 33, 34,
44, 45, 46,
47, 49, 50
Pin No.
40, 41
36, 37
31, 35
11, 26
5,6
10
32
42
43
48
51
52
53
54
55
56
1
2
3
4
7
8
9
VTT_PWRGD#/PD
CLKREQ#[A:B]
USB_48 [1:0]
SRCT/C[4:0]
ATIGT/C[3:0]
CPUT/C[2:0]
RESET_IN#
CPU_STP#
VSS_ATIG
VDD_ATIG
REF2/FSC
VDD_SRC
VDD_CPU
REF1/FSB
REF0/FSA
VDD_REF
VSS_SRC
VSS_REF
VDD_48
VSS_48
SDATA
XOUT
VDDA
SCLK
VSSA
Name
XIN
I/O, SE, 14.318 MHz REF clock output/CPU Frequency Select
I/O, SE 14.318 MHz REF clock output/CPU Frequency Select
I/O, SE 14.318 MHz REF clock output/CPU Frequency Select
O, DIF 100 MHz differential serial reference clock. Intel Type-SR buffer. (10%
O, DIF Differential Selectable serial reference clock. Intel Type-SR buffer.
O, DIF Differential CPU clock output.
O, SE 48 MHz clock output. Intel
I, SE,
PWR 3.3V power supply for REF, XTAL
PWR 3.3V power supply for USB outputs
GND
PWR 3.3V power supply for SRC outputs
GND
GND
PWR 3.3V power supply for ATIG outputs
GND
PWR 3.3V Analog Power for PLLs
PWR 3.3V power supply for CPU outputs
I, PU
I, PU
PWR GND for REF, XTAL
Type
PD
I/O
PU
O
I
I
I
INFORMATION
ADVANCE
14.318 MHz Crystal Input
14.318 MHz Crystal Output
Ground for USB outputs
3.3V LVTTL input. This pin is a level sensitive strobe used to latch the FS_A,
FS_B, and FS_C inputs. After asserting VTT_PWRGD# (active LOW), this pin
becomes a realtime input for asserting power-down (active HIGH)
SMBus-compatible SCLOCK.This pin has an internal pull-up, but is tri-stated in
power-down.
SMBus-compatible SDATA.This pin has an internal pull-up, but is tri-stated in
power-down.
Output Enable control for SRCT/C. Output enable control required by Minicard
specification. This pin has an internal pull-up.
0 = selected SRC output is enabled. 1 = selected SRC output is disabled.
overclocking support through SMBUS)
Ground for SRC outputs
Includes 50% overclock support through SMBUS
Ground for ATIG outputs
Analog Ground
Intel Type-SR buffer.
3.3V LVTTL input.
This pin is used to gate the CPU outputs. CPU outputs are turned off two cycles
after assertion of this pin
3.3V LVTTL Input (Negative Edge Triggered)
When this pin is asserted LOW, all PLLs will transition to a safe default frequency.
This may be the POR defaults or a safe value stored in SMBUS registers.
Intel Type-5 buffer.
Intel Type-5 buffer.
Intel Type-5 buffer.
®
Type-3A buffer
Description
CY28RS600-2
Page 2 of 17

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