ds21ft40 Maxim Integrated Products, Inc., ds21ft40 Datasheet - Page 2

• Manufacturer Part Number: ds21ft40
• Description: Ds21ft40 Four X Three 12 Channel E1 Framer
• Manufacturer: Maxim Integrated Products, Inc.

dual two-frame elastic stores contained in each of the four framers can be independently enabled and
disabled as required. The device fully meets all of the latest E1 specifications including CCITT/ITU
G.704, G.706, G.962, and I.431 as well as ETS 300 011 and ETS 300 233.
Functional Description
The receive side in each framer locates FAS frame and CRC and CAS multiframe boundaries as well as
detects incoming alarms including, carrier loss, loss of synchronization, AIS and Remote Alarm. If
needed, the receive side elastic store can be enabled in order to absorb the phase and frequency
differences between the recovered E1 data stream and an asynchronous backplane clock which is
provided at the RSYSCLK input. The clock applied at the RSYSCLK input can be either a 2.048 MHz
clock or a 1.544 MHz clock. The RSYSCLK can be a burst clock with speeds up to 8.192 MHz.
The transmit side in each
requirements and characteristics. Data off of a backplane can be passed through a transmit side elastic
store if necessary. The transmit formatter will provide the necessary frame/multiframe data overhead for
E1 transmission.
Reader’s Note: This data sheet assumes a particular nomenclature of the E1 operating environment. In
each 125 us frame, there are 32 8–bit timeslots numbered 0 to 31. Timeslot 0 is transmitted first and
received first. These 32 timeslots are also referred to as channels with a numbering scheme of 1 to 32.
Timeslot 0 is identical to channel 1, timeslot 1 is identical to Channel 2, and so on. Each timeslot (or
channel) is made up of 8 bits which are numbered 1 to 8. Bit number 1 is the MSB and is transmitted
first. Bit number 8 is the LSB and is transmitted last. Throughout this data sheet, the following
abbreviations will be used:
FAS
CAS
MF
Si
CRC4
CCS
Sa
E-bit
Frame Alignment Signal
Channel Associated Signaling
Multiframe
International bits
Cyclical Redundancy Check
Common Channel Signaling
Additional bits
CRC4 Error Bits
framer is totally independent from the receive side in both the clock
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DS21FT40