ds21ft40 Maxim Integrated Products, Inc., ds21ft40 Datasheet - Page 24

• Manufacturer Part Number: ds21ft40
• Description: Ds21ft40 Four X Three 12 Channel E1 Framer
• Manufacturer: Maxim Integrated Products, Inc.

NOTES:
1. Test Registers 1, 2, and 3 are used only by the factory; these registers must be cleared (set to all
2. Register banks CxH, DxH, ExH, and FxH are not accessible.
4. PARALLEL PORT
The DS21FT40 is controlled via either a non–multiplexed (MUX = 0) or a multiplexed (MUX = 1) bus by
an external microcontroller or microprocessor. The DS21FT40 can operate with either Intel or Motorola
bus timing configurations. If the BTS pin is tied low, Intel timing will be selected; if tied high, Motorola
timing will be selected. All Motorola bus signals are listed in parenthesis (). See the timing diagrams in
the A.C. Electrical Characteristics in Section 17 for more details.
5. CONTROL, ID AND TEST REGISTERS
The operation of each framer within the DS21FT40 is configured via a set of ten control registers.
Typically, the control registers are only accessed when the system is first powered up. Once a channel in
the DS21FT40 has been initialized, the control registers will only need to be accessed when there is a
change in the system configuration. There are two Receive Control Register (RCR1 and RCR2), two
Transmit Control Registers (TCR1 and TCR2), and six Common Control Registers (CCR1 to CCR6).
Each of the ten registers are described in this section.
There is a device Identification Register (IDR) at address 0Fh. The MSB of this read–only register is
fixed to a one indicating that the DS21Q44 die is present. The lower 4 bits of the IDR are used to display
the die revision of the chip.
ADDRESS
zeros) on power– up initialization to insure proper operation.
BA
BB
BC
BD
BE
BF
B5
B6
B7
B8
B9
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
–
–
–
–
Interleave Bus Operation Register
Transmit HDLC Information Register
Transmit HDLC FIFO Register
Receive HDLC DS0 Control Register 1
Receive HDLC DS0 Control Register 2
Transmit HDLC DS0 Control Register 1
Transmit HDLC DS0 Control Register 2
Not used
Not used
Not used
Not used
REGISTER NAME
24 of 87
ABBREVIATION
REGISTER
(set to 00H)
(set to 00H)
(set to 00H)
(set to 00H)
THFR
RDC1
RDC2
TDC1
TDC2
THIR
IBO
DS21FT40