ds21ft40 Maxim Integrated Products, Inc., ds21ft40 Datasheet - Page 55

• Manufacturer Part Number: ds21ft40
• Description: Ds21ft40 Four X Three 12 Channel E1 Framer
• Manufacturer: Maxim Integrated Products, Inc.

14.
Each framer in the DS21FT40 has the ability to extract/insert data from/ into the Sa bit positions (Sa4 to
Sa8) or from/to any multiple of DS0 channels Each framer contains a complete HDLC controller and this
operation is covered in Section 14.1.
14.1 GENERAL OVERVIEW
Each framer contains a complete HDLC controller with 64–byte buffers in both the transmit and receive
directions. The HDLC controller performs all the necessary overhead for generating and receiving a
HDLC formatted message.
The HDLC controller automatically generates and detects flags, generates and checks the CRC check
sum, generates and detects abort sequences, stuffs and destuffs zeros (for transparency), and byte aligns to
the HDLC data stream.
There are eleven registers that the host will use to operate and control the operation of the HDLC
controller. A brief description of the registers is shown in Table 14-1.
SYMBOLS
Sa5
Sa6
Sa7
Sa8
HDLC CONTROLLER FOR THE SA BITS OR DS0
POSITION
TSaCR.3
TSaCR.2
TSaCR.1
TSaCR.0
NAME AND DESCRIPTION
Additional Bit 5 Insertion Control Bit.
Additional Bit 6 Insertion Control Bit.
Additional Bit 7 Insertion Control Bit.
Additional Bit 8 Insertion Control Bit.
0=do not insert data from the TSa5 register into the transmit
data stream.
1=insert data from the TSa5 register into the transmit data
stream.
0=do not insert data from the TSa6 register into the transmit
data stream.
1=insert data from the TSa6 register into the transmit data
stream.
0=do not insert data from the TSa7 register into the transmit
data stream.
1=insert data from the TSa7 register into the transmit data
stream.
0=do not insert data from the TSa8 register into the transmit
data stream.
1=insert data from the TSa8 register into the transmit data
stream.
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