ds21ft40 Maxim Integrated Products, Inc., ds21ft40 Datasheet - Page 60

• Manufacturer Part Number: ds21ft40
• Description: Ds21ft40 Four X Three 12 Channel E1 Framer
• Manufacturer: Maxim Integrated Products, Inc.

RHIR: RECEIVE HDLC INFORMATION REGISTER (Address=B3 Hex)
NOTE:
The RABT, RCRCE, ROVR, and RVM bits are latched and will be cleared when read.
RABT
(MSB)
SYMBOLS
SYMBOLS
REMPTY
TMEND
RHALF
RCRCE
CBYTE
OBYTE
THALF
ROVR
RABT
RVM
RNE
POK
TNF
RCRCE
POSITION
POSITION
HIMR.4
HIMR.3
HIMR.2
HIMR.1
HIMR.0
RHIR.7
RHIR.6
RHIR.5
RHIR.4
RHIR.3
RHIR.2
RHIR.1
RHIR.0
ROVR
NAME AND DESCRIPTION
NAME AND DESCRIPTION
Abort Sequence Detected. Set whenever the HDLC controller
Valid Message. Set when the HDLC controller has detected
Receive FIFO Half Full.
0 = interrupt masked.
1 = interrupt enabled.
Receive FIFO Not Empty.
0 = interrupt masked.
1 = interrupt enabled.
Transmit FIFO Half Empty.
0 = interrupt masked.
1 = interrupt enabled.
Transmit FIFO Not Full.
0 = interrupt masked.
1 = interrupt enabled.
Transmit Message End.
0 = interrupt masked.
1 = interrupt enabled.
sees 7 or more ones in a row.
CRC Error. Set when the CRC checksum is in error.
Overrun. Set when the HDLC controller has attempted to
write a byte into an already full receive FIFO.
and checked a complete HDLC packet.
Empty. A real–time bit that is set high when the receive FIFO
is empty.
Packet OK. Set when the byte available for reading in the
receive FIFO at RHFR is the last byte of a valid message (and
hence no abort was seen, no overrun occurred, and the CRC
was correct).
Closing Byte. Set when the byte available for reading in the
receive FIFO at RFDL is the last byte of a message (whether
the message was valid or not).
Opening Byte. Set when the byte available for reading in the
receive FIFO at RHFR is the first byte of a message.
RVM
60 of 87
REMPTY
POK
CBYTE
OBYTE
(LSB)
DS21FT40