ds21ft40 Maxim Integrated Products, Inc., ds21ft40 Datasheet - Page 37

• Manufacturer Part Number: ds21ft40
• Description: Ds21ft40 Four X Three 12 Channel E1 Framer
• Manufacturer: Maxim Integrated Products, Inc.

ALARM CRITERIA Table 6-1
RSA1 (receive
signaling all ones)
RSA0 (receive
signaling all zeros)
RDMA (receive
distant multiframe
alarm)
RUA1 (receive
unframed all ones)
RRA (receive remote
alarm)
RCL (receive carrier
loss)
SR2: STATUS REGISTER 2 (Address=07 Hex)
(MSB)
RMF
SYMBOLS
RMF
TMF
RAF
ALARM
SEC
TAF
RAF
POSITION
over 16 consecutive frames
(one full MF) timeslot 16
contains less than three zeros
over 16 consecutive frames
(one full MF) timeslot 16
contains all zeros
bit 6 in timeslot 16 of frame 0
set to one for two consecutive
MF
less than three zeros in two
frames (512 bits)
bit 3 of non–align frame set
to one for three consecutive
occasions
255 (or 2048) consecutive
zeros received
SR2.7
SR2.6
SR2.5
SR2.4
SR2.3
TMF
SET CRITERIA
NAME AND DESCRIPTION
Receive CAS Multiframe. Set every 2 ms (regardless if CAS
Receive Align Frame. Set every 250 s at the beginning of
One Second Timer. Set on increments of one second based on
signaling is enabled or not) on receive multiframe boundaries.
Used to alert the host that signaling data is available.
align frames. Used to alert the host that Si and Sa bits are
available in the RAF and RNAF registers.
Transmit Multiframe. Set every 2 ms (regardless if CRC4 is
enabled) on transmit multiframe boundaries. Used to alert the
host that signaling data needs to be updated.
RCLK. If CCR2.7=1, then this bit will be set every 62.5 ms
instead of once a second.
Transmit Align Frame. Set every 250 s at the beginning of
align frames. Used to alert the host that the TAF and TNAF
registers need to be updated.
SEC
37 of 87
TAF
over 16 consecutive frames
(one full MF) timeslot 16
contains three or more zeros
over 16 consecutive frames
(one full MF) timeslot 16
contains at least a single one
bit 6 in timeslot 16 of frame 0
set to zero for two
consecutive MF
more than two zeros in two
frames (512 bits)
bit 3 of non–align frame set
to zero for three consecutive
occasions
in 255 bit times, at least 32
ones are received
CLEAR CRITERIA
LOTC
RCMF
G.775 / G.962
SPEC.
1.6.1.2
G.732
G.732
O.162
O.162
O.162
2.1.5
2.1.4
ITU
4.2
5.2
TSLIP
(LSB)
DS21FT40