ds21ft40 Maxim Integrated Products, Inc., ds21ft40 Datasheet - Page 47

• Manufacturer Part Number: ds21ft40
• Description: Ds21ft40 Four X Three 12 Channel E1 Framer
• Manufacturer: Maxim Integrated Products, Inc.

TCBR1/TCBR2/TCBR3/TCBR4: DEFINITION WHEN CCR3.6=1
CH20
CH24
CH28
CH32
*=CH1 and CH17 should be set to one to allow the internal TS1 register to create the CAS Multiframe
Alignment Word and Spare/Remote Alarm bits.
9.2
Receive Side
Hardware signaling is supported through a mode called signaling re-insertion which is invoked by setting
the RSRE control bit high (CCR3.3=1). In this mode, the user will provide a multiframe sync at the
RSYNC pin and the signaling data will be re-aligned at the RSER output according to this applied
multiframe boundary. In this mode, the elastic store must be enabled and the backplane clock must be
2.048 MHz.
The signaling data in the two multiframe buffer will be frozen in a known good state upon either a loss of
synchronization (OOF event), carrier loss, or frame slip. To allow this freeze action to occur, the RFE
control bit (CCR2.0) should be set high. The user can force a freeze by setting the RFF control bit
(CCR2.1) high. Setting the RFF bit high causes the same freezing action as if a loss of synchronization,
carrier loss, or slip has occurred.
The 2 multiframe buffer provides an approximate 1 multiframe delay in the signaling bits provided at the
RSER pin (if RSRE=1 via CCR3.3). When freezing is enabled (RFE=1), the signaling data will be held
in the last known good state until the corrupting error condition subsides. When the error condition sub-
sides, the signaling data will be held in the old state for an additional 3 ms to 5 ms before being allowed
to be updated with new signaling data.
10.
Each framer in the DS21FT40 can replace data on a channel–by–channel basis in both the transmit and
receive directions. The transmit direction is from the backplane to the E1 line and is covered in Section
10.1. The receive direction is from the E1 line to the backplane and is covered in Section 10.2.
10.1 TRANSMIT SIDE CODE GENERATION
In the transmit direction there are two methods by which channel data from the backplane can be
overwritten with data generated by the framer. The first method which is covered in Section 10.1.1 was a
feature contained in the original DS21Q43 while the second method which is covered in Section 10.1.2 is
a new feature of the DS21Q44.
10.1.1
The first method involves using the Transmit Idle Registers (TIR1/2/3/4) to determine which of the 32 E1
channels should be overwritten with the code placed in the Transmit Idle Definition Register (TIDR).
(MSB)
HARDWARE BASED SIGNALING
PER–CHANNEL CODE GENERATION AND LOOPBACK
CH4
CH8
CH12
CH16
Simple Idle Code Insertion and Per–Channel Loopback
CH19
CH23
CH27
CH31
CH3
CH7
CH11
CH15
CH18
CH22
CH26
CH30
47 of 87
CH2
CH6
CH10
CH14
CH17*
CH21
CH25
CH29
(LSB)
CH1*
CH5
CH9
CH13
TCBR1(22)
TCBR2(23)
TCBR3(24)
TCBR4(25)
DS21FT40