pi7c8154b Pericom Semiconductor Corporation, pi7c8154b Datasheet - Page 6

• Manufacturer Part Number: pi7c8154b
• Description: Asynchronous 2-port Pci Bridge
• Manufacturer: Pericom Semiconductor Corporation

06-0008
3
4
5
6
7
2.10
2.11
3.1
3.2
3.3
3.4
4.1
4.2
4.3
4.4
5.1
5.2
5.3
5.4
6.1
6.2
6.3
7.1
7.2
2.11.1
2.11.2
2.11.3
2.11.3.1
2.11.3.2
2.11.3.3
2.11.4
2.11.4.1
2.11.4.2
2.11.4.3
ADDRESS DECODING ............................................................................................................................43
3.2.1
3.2.2
3.3.1
3.3.2
3.3.3
3.4.1
3.4.2
TRANSACTION ORDERING .................................................................................................................49
ERROR HANDLING ................................................................................................................................52
5.2.1
5.2.2
5.2.3
5.2.4
EXCLUSIVE ACCESS..............................................................................................................................61
6.2.1
6.2.2
PCI BUS ARBITRATION.........................................................................................................................64
7.2.1
7.2.2
TRANSACTION FLOW THROUGH ...............................................................................................37
TRANSACTION TERMINATION....................................................................................................37
ADDRESS RANGES .........................................................................................................................43
I/O ADDRESS DECODING ..............................................................................................................43
MEMORY ADDRESS DECODING..................................................................................................45
VGA SUPPORT .................................................................................................................................48
TRANSACTIONS GOVERNED BY ORDERING RULES .............................................................49
GENERAL ORDERING GUIDELINES ...........................................................................................50
ORDERING RULES ..........................................................................................................................51
DATA SYNCHRONIZATION ..........................................................................................................52
ADDRESS PARITY ERRORS ..........................................................................................................52
DATA PARITY ERRORS .................................................................................................................53
DATA PARITY ERROR REPORTING ............................................................................................57
SYSTEM ERROR (SERR#) REPORTING .......................................................................................60
CONCURRENT LOCKS ...................................................................................................................61
ACQUIRING EXCLUSIVE ACCESS ACROSS PI7C8154B...........................................................61
ENDING EXCLUSIVE ACCESS......................................................................................................63
PRIMARY PCI BUS ARBITRATION ..............................................................................................64
SECONDARY PCI BUS ARBITRATION ........................................................................................64
I/O BASE AND LIMIT ADDRESS REGISTER ..............................................................................44
ISA MODE .....................................................................................................................................45
MEMORY-MAPPED I/O BASE AND LIMIT ADDRESS REGISTERS..........................................46
PREFETCHABLE MEMORY BASE AND LIMIT ADDRESS REGISTERS...................................46
PREFETCHABLE MEMORY 64-BIT ADDRESSING REGISTERS ..............................................47
VGA MODE ...................................................................................................................................48
VGA SNOOP MODE .....................................................................................................................49
CONFIGURATION WRITE TRANSACTIONS TO CONFIGURATION SPACE...........................53
READ TRANSACTIONS ................................................................................................................54
DELAYED WRITE TRANSACTIONS ............................................................................................54
POSTED WRITE TRANSACTIONS ...............................................................................................56
LOCKED TRANSACTIONS IN DOWNSTREAM DIRECTION.....................................................62
LOCKED TRANSACTION IN UPSTREAM DIRECTION .............................................................63
SECONDARY BUS ARBITRATION USING THE INTERNAL ARBITER......................................64
PREEMPTION...............................................................................................................................66
MASTER TERMINATION INITIATED BY PI7C8154B............................................................38
MASTER ABORT RECEIVED BY PI7C8154B .........................................................................38
TARGET TERMINATION RECEIVED BY PI7C8154B............................................................39
DELAYED WRITE TARGET TERMINATION RESPONSE ......................................................39
POSTED WRITE TARGET TERMINATION RESPONSE.........................................................40
DELAYED READ TARGET TERMINATION RESPONSE .......................................................40
TARGET TERMINATION INITIATED BY PI7C8154B ............................................................41
TARGET RETRY .......................................................................................................................41
TARGET DISCONNECT...........................................................................................................42
TARGET ABORT.......................................................................................................................43
Page 6 of 111
MARCH 2006 REVISION 1.12
ASYNCHRONOUS 2-PORT
PCI-to-PCI BRIDGE
PI7C8154B