pnx1500 NXP Semiconductors, pnx1500 Datasheet - Page 320

• Manufacturer Part Number: pnx1500
• Description: Pnx15xx Series Connected Media Processor
• Manufacturer: NXP Semiconductors

Philips Semiconductors
Volume 1 of 1
PNX15XX_SER_3
Product data sheet
CPU_RATIO #cycles_in_previous_burst
CPU_BW
Figure 5:
=
CPU_LIMIT
CPU_CLIP
CPU account using dynamic ratios
CPU account
-------------------------------------------------------------------- -
#cycles_between_arbitration
#cycles_in_previous_burst
#cycles_in_burst
#cycles_in_burst
x CPU_RATIO
transfers
Whenever a CPU DDR burst is started with dynamic ratios, the internal account is
incremented by an amount equal to “the number of clock cycles spent on the previous
CPU DDR burst” times the CPU_RATIO. This way the real overhead is measured and
accounted for and therefore the accounting mechanism is much more accurate.
In the time zone marked “constant average account below clip” in
transfer rate is such that the average value of the CPU account is constant. In this
zone, we have the following equilibrium:
Where #cycles_in_burst is the actual number of cycles it takes to complete this DDR
burst, and #cycles_in_previous_burst is the total number of clock cycles spent on
executing CPU bursts since the previous CPU command won the arbitration.
From this the CPU bandwidth with constant average account is derived:
Considering that on average, the number of cycles in a burst will be equal to the
number of cycles in the previous burst, the average CPU bandwidth is:
When the CPU account exceeds the CPU_CLIP value, the account can only stay
constant when the CPUs take 100% of the available bandwidth. This is unlikely to
happen because the CPU account exceeds the CPU_LIMIT value, giving DMA a
higher priority than the CPUs. Therefore, the CPU account will not stay above
CPU_CLIP for long.
With dynamic ratios enabled, the free bandwidth is also handled differently. When the
bandwidth is for free i.e., the account is above the CPU_CLIP value, the internal
account is not incremented at all. To ensure the internal account has the same value
before and after the free bandwidth DDR burst, the account never decrements
average CPU_BW
(
slope = CPU_DECR/cycle
=
=
-------------------------------------------------------------------------------------------------------------------------------------------- -
CPU_RATIO
CPU_DECR
)
Rev. 3 — 17 March 2006
=
--------------------------------------------------------------------- -
CPU_RATIO
CPU_DECR
#cycles_in_previous_burst
--------------------------------------------------------------- -
#cycles_between_arbitration #cycles_in_burst
constant average account below clip,
see text
+
#cycles_in_burst
CPU_DECR
CPU_DECR
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
+
Chapter 9: DDR Controller
–
CPU_DECR
PNX15xx Series
Figure
time
5, the
9-7