pnx1500 NXP Semiconductors, pnx1500 Datasheet - Page 712

• Manufacturer Part Number: pnx1500
• Description: Pnx15xx Series Connected Media Processor
• Manufacturer: NXP Semiconductors

Philips Semiconductors
Volume 1 of 1
PNX15XX_SER_3
Product data sheet
driver writes the number of descriptors and statuses (4) in the
Tx(Rt)DescriptorNumber register. The descriptors and statuses in the arrays need
not be initialized, yet.
Initialization may already enable the Transmit Datapath by setting the Tx(Rt)Enable
bit in the Command register. In case the Transmit Datapath is enabled while there are
no further packets to send, the Tx(Rt)FinishedInt interrupt flag will be set. To reduce
the processor interrupt load, some interrupts can be disabled by setting the relevant
bits in the IntEnable register.
Now suppose application software wants to transmit a packet of 12 bytes using a
TCP/IP protocol (though in realistic applications, packets will be larger than 12 bytes).
The TCP/IP stack will add a header to the packet. Because the LAN100 can perform
scatter/gather DMA, the packet header need not be located in memory at the
beginning of the payload data. The device driver can program a Tx gather DMA
operation to collect header and payload data. To do so, the device driver will program
the first descriptor to point at the packet header; the Last flag in the descriptor will be
set to 0 to indicate a multi-fragment transmission. The device driver will program the
next descriptor to point at the actual payload data. The maximum size of a payload
buffer is 2KB, so a single descriptor suffices to describe the payload buffer. For the
sake of the example though, the payload is distributed across two descriptors. After
the first descriptor in the array describing the header, the second descriptor in the
descriptor array describes the initial 8 bytes of the payload; the third descriptor in the
array describes the remaining 4 bytes of the packet. In the third descriptor the Last bit
in the Control word is set to 1 to indicate it is the last descriptor in the packet. In this
example the Interrupt bit in the descriptor Control field is set in the last fragment of
the packet to trigger an interrupt after the transmission completed. The Size field in
the descriptor’s Control word is set to the number of bytes in the fragment buffer, –1
encoded.
Note that in more realistic applications, the payload would be split across multiple
descriptors only if it is more than 2KB. Also note that transmission payload data is
forwarded to the hardware without the device driver having to copy it (zero copy
device driver).
After setting up the descriptors for the transaction, the device driver increments the
Tx(Rt)ProduceIndex register by 3, since three descriptors have been programmed. If
the Transmit Datapath was not enabled during initialization the device driver must
enable the datapath now.
If the Transmit Datapath is enabled, the LAN100 will start transmitting the packet as
soon as it detects the Tx(Rt)ProduceIndex is not equal to Tx(Rt)ConsumeIndex. The
Tx(Rt) DMA will start reading the descriptors from memory with the base address
from the Tx(Rt)Descriptor register and a block size of 3 descriptors * 4 words per
descriptor = 12 . The memory system will return the descriptors and the LAN100 will
accept them one by one while issuing read commands for reading the transmit data
fragments. The commands will have the address from the Packet field in the
descriptor and a block size equal to the Size field in the descriptor.
As soon as transmission read data is returned from memory, the LAN100 will try to
start transmission on the Ethernet connection via the (R)MII Interface.
Rev. 3 — 17 March 2006
Chapter 23: LAN100 — Ethernet Media Access Controller
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
PNX15xx Series
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