pnx1500 NXP Semiconductors, pnx1500 Datasheet - Page 711

• Manufacturer Part Number: pnx1500
• Description: Pnx15xx Series Connected Media Processor
• Manufacturer: NXP Semiconductors

Philips Semiconductors
Volume 1 of 1
PNX15XX_SER_3
Product data sheet
Figure 6:
Tx(Rt)Descriptor
0xFEEDB0EC
Transmit example memory and registers
0xFEEDB0EC
0xFEEDB0FC
0xFEEDB10C
0xFEEDB118
0xFEEDB11C
0xFEEDB0F8
0xFEEDB008
0xFEEDB128
5.4.9 Transmit example
Descriptor Array FIFO
0 0
0 0
0 0
0 0
Packet 0xFEEDB314
Packet 0xFEEDB411
Packet 0xFEEDB419
Packet 0xFEEDB324
Control
Pad
Control
Pad
Control
Pad
Control
Pad
All of the above interrupts can be enabled and disabled by setting or resetting the
corresponding bits in the IntEnable register. Enabling or disabling interrupts does not
affect the IntStatus register contents, only the propagation of the interrupt status to
the CPU.
The interrupts, either of individual packets or of the whole list, are a good means of
communication between the DMA manager and the device driver, triggering the
device driver to inspect the status words of descriptors that have been processed.
Figure 6
payload of 12 bytes.
After reset, the values of the DMA registers will be zero. During initialization, the
device driver will allocate the descriptor and status array in memory. In this example,
an array of four descriptors is allocated; the array is 4x4x4 bytes and aligned on a
4-byte address boundary. Since the number of descriptors should match the number
of statuses, the status array consists of four elements; the array is 4x2x4 bytes and
aligned on an 8-byte address boundary. The device driver writes the base address of
the descriptor array (0xFEEDB0EC) in the Tx(Rt)Descriptor register and the base
address of the status array (0xFEEDB1F8) in the Tx(Rt)Status register. The device
time-stamp
time-stamp
time-stamp
time-stamp
7
7
7
7
illustrates the transmit process with a packet header of 8 bytes and a packet
Fragment Buffers
Rev. 3 — 17 March 2006
Packet 0 header (8 bytes)
Packet 1 header (8 bytes)
Chapter 23: LAN100 — Ethernet Media Access Controller
Packet 0 payload (12 bytes)
0xFEEDB1F8
Tx(Rt)Status
Tx(Rt)DescriptorIndex
Tx(Rt)ConsumeIndex
Tx(Rt)ProduceIndex
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
StatusTimeStamp
StatusTimeStamp
StatusTimeStamp
StatusTimeStamp
Status Array FIFO
PNX15xx Series
StatusInfo
StatusInfo
StatusInfo
StatusInfo
0xFEEDB200
0xFEEDB1F8
0xFEEDB210
0xFEEDB208
23-42