W83977G Winbond Electronics Corp America, W83977G Datasheet - Page 67

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W83977G

Manufacturer Part Number
W83977G
Description
W83877TF plus KBC, CIR, RTC, Pb-free
Manufacturer
Winbond Electronics Corp America
Datasheet

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7.3
7.3.1
These two registers of BLL and BHL are baud rate divisor latch in the legacy SIR/ASK-IR mode.
Accessing these registers in Advanced IR mode will cause backward operation, that is, UART will fall
back to legacy SIR mode and clear some register values as shown in the following table.
Note that DIS_BACK=1 (Disable Backward operation) in legacy SIR/ASK-IR mode will not affect any register which is
meaningful in legacy SIR/ASK-IR.
7.3.2
These registers are defined as the same as Set 0 registers.
7.4
These registers are only used in advanced modes.
ADDRESS
ADDRESS
W83977F-A/ W83977G-A/ W83977AF-A/ W83977AG-A
OFFSET
OFFSET
Set1 - Legacy Baud Rate Divisor Register
Set2 - Interrupt Status or IR FIFO Control Register (ISR/UFR)
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
SET & REGISTER
Set1.Reg0~1 - Baud Rate Divisor Latch (BLL/BHL)
Set1.Reg 2~7
Set 0.Reg 4
Set 2.Reg 2
Set 4.Reg 3
UDR/ESCR
REGISTER
REGISTER
UCR/SSR
ISR/UFR
Reserved
RXFDTH
TXFDTH
ADCR1
ADCR2
NAME
NAME
ABLL
ABHL
HCR
BHL
USR
HSR
BLL
SSR
Baud Rate Divisor Latch (Low Byte)
Baud Rate Divisor Latch (High Byte)
Interrupt Status or IR FIFO Control Register
IR Control or Sets Select Register
Handshake Control Register
IR Status Register
Handshake Status Register
User Defined Register
Advanced Baud Rate Divisor Latch (Low Byte)
Advanced Baud Rate Divisor Latch (High Byte)
Advanced IR Control Register 1
Sets Select Register
Advanced IR Control Register 2
Transmitter FIFO Depth
Receiver FIFO Depth
ADVANCED MODE
DIS_BACK=¡Ñ
-59 -
Bit 0, 5, 7
Bit 7~5
Bit 2, 3
REGISTER DESCRIPTION
REGISTER DESCRIPTION
Publication Release Date: May 2006
-
LEGACY MODE
DIS_BACK=0
Bit 5, 7
-
-
Revision 0.60

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