W83977G Winbond Electronics Corp America, W83977G Datasheet - Page 92

• Manufacturer Part Number: W83977G
• Description: W83877TF plus KBC, CIR, RTC, Pb-free
• Manufacturer: Winbond Electronics Corp America

8.2.3
The system microprocessor can read the contents of the printer control latch by reading the printer
control swapper. Bit definitions are as follows:
Bit 7, 6: These two bits are a logic one during a read. They can be written.
Bit 5: Direction control bit
Bit 4: A 1 in this position allows an interrupt to occur when ACK changes from low to high.
Bit 3: A 1 in this bit position selects the printer.
Bit 2: A 0 starts the printer (50 microsecond pulse, minimum).
Bit 1: A 1 causes the printer to line-feed after a line is printed.
Bit 0: A 0.5 microsecond minimum high active pulse clocks data into the printer. Valid data must be
8.2.4
The address port is available only in EPP mode. Bit definitions are as follows:
The contents of DB0-DB7 are buffered (non-inverting) and output to ports PD0-PD7 during a write
operation. The leading edge of IOW causes an EPP address write cycle to be performed, and the
trailing edge of IOW latches the data for the duration of the EPP write cycle.
PD0-PD7 ports are read during a read operation. The leading edge of IOR causes an EPP address
read cycle to be performed and the data to be output to the host CPU.
W83977F-A/ W83977G-A/ W83977AF-A/ W83977AG-A
the parallel port is in output mode (write). This bit can be read and written. In SPP mode, this
bit is invalid and fixed at zero.
present for a minimum of 0.5 microseconds before and after the strobe pulse.
Printer Control Latch and Printer Control Swapper
EPP Address Port
When this bit is a logic 1, the parallel port is in input mode (read); when it is a logic 0,
1
7
7
6
1
6
5
5
4
3
4
2
-84
3
1
2
0
1
STROBE
AUTO FD
INIT
SLCT IN
IRQ ENABLE
DIR
0
PD0
PD1
PD2
PD3
PD4
PD5
PD6
PD7