W83977G Winbond Electronics Corp America, W83977G Datasheet - Page 75

• Manufacturer Part Number: W83977G
• Description: W83877TF plus KBC, CIR, RTC, Pb-free
• Manufacturer: Winbond Electronics Corp America

7.7.2
These registers control flow control mode operation as shown in the following table.
Bit 7~5
Bit 4:
Bit 3:
Bit 2:
Bit 1:
Bit 0:
FC_MD
REG.
Reset
Value
W83977F-A/ W83977G-A/ W83977AF-A/ W83977AG-A
Set5.Reg2 - Flow Control Mode Operation (FC_MD)
FC_MD2 - Flow Control Mode
When flow control is enforced, these bits will be loaded into AD_MD2~0 of advanced
HSR (Handshake Status Register). These three bits are defined as same as AD_MD2~0.
Reserved, write 0.
FC_DSW - Flow Control DMA Channel Swap
A write to 1 allow user to swap DMA channel for transmitter or receiver when flow control
is enforced.
EN_FD - Enable Flow DMA Control
A write to 1 enables UART to use DMA channel when flow control is enforced.
EN_BRFC - Enable Baud Rate Flow Control
A write to 1 enables FC_BLL/FC_BHL (Flow Control Baud Rate Divider Latch, in
Set5.Reg1~0) to be loaded into advanced baud rate divisor latch (ADBLL/ADBHL, in
Set2.Reg1~0).
EN_FC - Enable Flow Control
A write to 1 enables flow control function and bit 7~1 of this register.
FC_MD2
BIT 7
0
FC_DSW
0
1
FC_MD1
BIT 6
0
FC_MD0
BIT 5
0
Next Mode After Flow Control Occurred
-67 -
BIT 4
0
-
Transmitter Channel
Receiver Channel
FC_DSW
BIT 3
0
Publication Release Date: May 2006
EN_FD
BIT 2
0
EN_BRFC
BIT 1
0
Revision 0.60
EN_FC
BIT 0
0