r5s72060w200fpv Renesas Electronics Corporation., r5s72060w200fpv Datasheet - Page 216

• Manufacturer Part Number: r5s72060w200fpv
• Description: 32-bit Risc Microcomputer Superhtm Risc Engine Family / Sh7200 Series
• Manufacturer: Renesas Electronics Corporation.

Section 7 Cache
Operations in sections 7.3.2 to 7.3.5 are compiled in table 7.8.
Table 7.8
[Legend]
x:
Note: Cache renewal cycle: 16-byte read access, write-back cycle in write-back buffer: 16-byte
Rev. 2.00 Dec. 09, 2005 Page 192 of 1152
REJ09B0191-0200
Cache
Instruction
cache
Operand
cache
Don't care.
write access
*
Neither LRU renewed. LRU is renewed in all other cases.
CPU Cycle
Instruction
fetch
Prefetch/
read
Write
Cache Operations
Hit/
miss
Hit
Miss
Hit
Miss
Hit
Miss
Write-back mode/
write through
mode


Either mode is
available
mode
Write-back mode
Write-through
mode
Write-back mode
mode
Write-back mode
Write-through
Write-through
U
Bit


x

0
1

x

0
1
External Memory
Accession
(through internal bus)
Not generated
Cache renewal cycle is
generated
Not generated
Cache renewal cycle is
generated
Cache renewal cycle is
generated
Cache renewal cycle is
generated. Succeedingly
write-back cycle in write-back
buffer is generated.
Write cycle CPU issues is
generated.
Not generated
Write cycle CPU issues is
generated.
Cache renewal cycle is
generated
Cache renewal cycle is
generated. Succeedingly
write-back cycle in write-back
buffer is generated.
Cache Contents
Not renewed
Renewed to new values by
cache renewal cycle
Not renewed
Renewed to new values by
cache renewal cycle
Renewed to new values by
cache renewal cycle
Renewed to new values by
cache renewal cycle
Renewed to new values by write
cycle the CPU issues
Renewed to new values by write
cycle the CPU issues
Not renewed*
Renewed to new values by
cache renewal cycle.
Subsequently renewed again to
new values in write cycle CPU
issues.
Renewed to new values by
cache renewal cycle.
Subsequently renewed again to
new values in write cycle CPU
issues.