r5s72060w200fpv Renesas Electronics Corporation., r5s72060w200fpv Datasheet - Page 414

• Manufacturer Part Number: r5s72060w200fpv
• Description: 32-bit Risc Microcomputer Superhtm Risc Engine Family / Sh7200 Series
• Manufacturer: Renesas Electronics Corporation.

Section 9 Direct Memory Access Controller (DMAC)
Table 9.8
Rev. 2.00 Dec. 09, 2005 Page 390 of 1152
REJ09B0191-0200
CHCR
RS[3:0] MID
1000
100000
100001
100010
100011
101000
101100 11
101101 11
111000 11
111001 11
111010 11
111011 11
111100 11
111110 11
111111 11
DMARS
Selecting On-Chip Peripheral Module Request Modes with RS3 to RS0 Bits
RID
01
10
01
10
01
10
01
10
01
10
DMA Transfer
Request
Source
SCIF_0 transmit TXI0 (transmit FIFO data empty) Any
SCIF_0 receive
SCIF_1 transmit TXI1 (transmit FIFO data empty) Any
SCIF_1 receive
SCIF_2 transmit TXI2 (transmit FIFO data empty) Any
SCIF_2 receive
SCIF_3 transmit TXI3 (transmit FIFO data empty) Any
SCIF_3 receive
IIC3 transmit
IIC3 receive
A/D converter_0 ADI0 (A/D conversion end)
A/D converter_1 ADI1 (A/D conversion end)
MTU2_0
MTU2_1
MTU2_2
MTU2_3
MTU2_4
CMT_0
CMT_1
TXI (transmit data empty)
CMI0 (compare match)
CMI1 (compare match)
DMA Transfer
Request Signal
RXI0 (receive FIFO data full)
RXI1 (receive FIFO data full)
RXI2 (receive FIFO data full)
RXI3 (receive FIFO data full)
RXI (receive data full)
TGI0A (input capture/compare
match)
TGI1A (input capture/compare
match)
TGI2A (input capture/compare
match)
TGI3A (input capture/compare
match)
TGI4A (input capture/compare
match)
Transfer
Source
SCFRDR_0 Any
SCFRDR_1 Any
SCFRDR_2 Any
SCFRDR_3 Any
Any
ICDRR
ADDR0
ADDR1
Any
Any
Any
Any
Any
Any
Any
Transfer
Destination
SCFTDR_0
SCFTDR_1
SCFTDR_2
SCFTDR_3
ICDRT
Any
Any
Any
Any
Any
Any
Any
Any
Any
Any
Bus
Mode
Cycle
steal
Cycle
steal
Cycle
steal
Cycle
steal or
burst
Cycle
steal or
burst