r5s72060w200fpv Renesas Electronics Corporation., r5s72060w200fpv Datasheet - Page 542

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r5s72060w200fpv

Manufacturer Part Number
r5s72060w200fpv
Description
32-bit Risc Microcomputer Superhtm Risc Engine Family / Sh7200 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet

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Section 10 Multi-Function Timer Pulse Unit 2 (MTU2)
10.4.6
In phase counting mode, the phase difference between two external clock inputs is detected and
TCNT is incremented/decremented accordingly. This mode can be set for channels 1 and 2.
When phase counting mode is set, an external clock is selected as the counter input clock and
TCNT operates as an up/down-counter regardless of the setting of bits TPSC0 to TPSC2 and bits
CKEG0 and CKEG1 in TCR. However, the functions of bits CCLR0 and CCLR1 in TCR, and of
TIOR, TIER, and TGR, are valid, and input capture/compare match and interrupt functions can be
used.
This can be used for two-phase encoder pulse input.
If overflow occurs when TCNT is counting up, the TCFV flag in TSR is set; if underflow occurs
when TCNT is counting down, the TCFU flag is set.
The TCFD bit in TSR is the count direction flag. Reading the TCFD flag reveals whether TCNT is
counting up or down.
Table 10.47 shows the correspondence between external clock pins and channels.
Table 10.47 Phase Counting Mode Clock Input Pins
(1)
Figure 10.29 shows an example of the phase counting mode setting procedure.
Rev. 2.00 Dec. 09, 2005 Page 518 of 1152
REJ09B0191-0200
Channels
When channel 1 is set to phase counting mode
When channel 2 is set to phase counting mode
Example of Phase Counting Mode Setting Procedure
Phase Counting Mode
Figure 10.29 Example of Phase Counting Mode Setting Procedure
<Phase counting mode>
Select phase counting
Phase counting mode
Start count
mode
[1]
[2]
[1] Select phase counting mode with bits
[2] Set the CST bit in TSTR to 1 to start
MD3 to MD0 in TMDR.
the count operation.
A-Phase
TCLKA
TCLKC
External Clock Pins
B-Phase
TCLKB
TCLKD

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